qemu-e2k/target-sparc
Peter Maydell 6d5322442a target-sparc: Migrate CWP and PIL for SPARC64
In SPARC32 the env->cwp and env->psrpil state is part of the PSR
register, and gets migrated as part of that register.
In SPARC64 this state is in separate CWP and PIL registers, but we
were not doing anything to migrate those.

Add the missing fields to the migration vmstate (which is a
migration break, but without these fields migration is completely
broken anyway).

This change means that trying a save/load of a SPARC64 target at
the boot rom prompt now produces a system which at least responds
to keyboard input after the restore.

Reported-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2016-01-16 12:01:23 +00:00
..
cc_helper.c
cpu-qom.h target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
cpu.c target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
cpu.h target-sparc: Convert to VMStateDescription 2016-01-16 12:01:23 +00:00
fop_helper.c
gdbstub.c
helper.c target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
helper.h target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
int32_helper.c
int64_helper.c
ldst_helper.c target-sparc: is_translating_asi() is TARGET_SPARC64 only 2015-01-21 16:18:01 +00:00
machine.c target-sparc: Migrate CWP and PIL for SPARC64 2016-01-16 12:01:23 +00:00
Makefile.objs monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
mmu_helper.c tlb: Add "ifetch" argument to cpu_mmu_index() 2015-09-11 08:15:28 -07:00
monitor.c monitor: remove target-specific code from monitor.c 2015-09-16 17:33:32 +02:00
TODO
translate.c target-sparc: implement NPT timer bit 2016-01-07 12:21:06 +00:00
vis_helper.c target-sparc: fix 32-bit truncation in fpackfix 2015-11-26 16:47:44 +01:00
win_helper.c target-sparc: Split cpu_put_psr into side-effect and no-side-effect parts 2016-01-16 12:01:23 +00:00