Richard Henderson 68ad9260e0 target/mips: Use 8-byte memory ops for msa load/store ... Rather than use 4-16 separate operations, use 2 operations plus some byte reordering as necessary. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2021-10-13 08:42:49 -07:00
..
alpha	hw/core: Make do_unaligned_access noreturn	2021-09-21 19:36:44 -07:00
arm	accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h	2021-10-13 08:14:54 -07:00
avr	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
cris	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
hexagon	target/hexagon: Implement cpu_mmu_index	2021-10-13 07:59:23 -07:00
hppa	hw/core: Make do_unaligned_access noreturn	2021-09-21 19:36:44 -07:00
i386	target/i386: Use MO_128 for 16 byte atomics	2021-10-13 07:58:00 -07:00
m68k	accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h	2021-10-13 08:14:54 -07:00
microblaze	hw/core: Make do_unaligned_access noreturn	2021-09-21 19:36:44 -07:00
mips	target/mips: Use 8-byte memory ops for msa load/store	2021-10-13 08:42:49 -07:00
nios2	hw/core: Make do_unaligned_access noreturn	2021-09-21 19:36:44 -07:00
openrisc	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
ppc	accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h	2021-10-13 08:14:54 -07:00
riscv	target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty()	2021-10-07 08:41:33 +10:00
rx	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
s390x	accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h	2021-10-13 08:14:54 -07:00
sh4	target/sh4: Use lookup_symbol in sh4_tr_disas_log	2021-10-04 09:47:26 +02:00
sparc	tcg: Rename TCGMemOpIdx to MemOpIdx	2021-10-05 16:53:17 -07:00
tricore	include/exec: Move cpu_signal_handler declaration	2021-09-21 19:36:44 -07:00
xtensa	target/xtensa: list cores in a text file	2021-10-05 13:10:29 +02:00
Kconfig
meson.build