Georg Kotheimer 9a27f69bd6 target/riscv: Prevent lost illegal instruction exceptions ... When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means that we skipped illegal compressed instructions instead of raising an illegal instruction exception. Instead of patching decode_RV32_64C(), we can just remove it, as it is dead code since f330433b36 anyway. Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210322121609.3097928-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2021-03-22 21:54:40 -04:00
..
insn_trans
arch_dump.c
cpu_bits.h
cpu_helper.c	target/riscv: Add proper two-stage lookup exception detection	2021-03-22 21:54:40 -04:00
cpu_user.h
cpu-param.h
cpu.c	target/riscv: Add proper two-stage lookup exception detection	2021-03-22 21:54:40 -04:00
cpu.h	target/riscv: Add proper two-stage lookup exception detection	2021-03-22 21:54:40 -04:00
csr.c
fpu_helper.c
gdbstub.c
helper.h
insn16-32.decode
insn16-64.decode
insn16.decode
insn32-64.decode
insn32.decode
instmap.h
internals.h
machine.c
meson.build
monitor.c
op_helper.c
pmp.c
pmp.h
trace-events
trace.h
translate.c	target/riscv: Prevent lost illegal instruction exceptions	2021-03-22 21:54:40 -04:00
vector_helper.c