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insn_trans
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target/riscv: Replace Zvbb checking by Zvkb
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2023-11-07 11:06:02 +10:00 |
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kvm
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target/riscv/kvm: add zicsr, zifencei, zba, zbs, svnapot
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2023-11-07 11:06:02 +10:00 |
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tcg
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target/riscv: Add "pmu-mask" property to replace "pmu-num"
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2023-11-07 11:06:02 +10:00 |
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arch_dump.c
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bitmanip_helper.c
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common-semi-target.h
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cpu_bits.h
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target/riscv: Add M-mode virtual interrupt and IRQ filtering support.
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2023-11-07 11:02:17 +10:00 |
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cpu_cfg.h
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target/riscv: Add "pmu-mask" property to replace "pmu-num"
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2023-11-07 11:06:02 +10:00 |
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cpu_helper.c
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target/riscv: Add HS-mode virtual interrupt and IRQ filtering support.
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2023-11-07 11:02:17 +10:00 |
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cpu_user.h
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cpu_vendorid.h
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cpu-param.h
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cpu-qom.h
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target: Move ArchCPUClass definition to 'cpu.h'
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2023-11-07 13:08:48 +01:00 |
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cpu.c
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hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name()
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2023-11-07 13:08:48 +01:00 |
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cpu.h
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target/riscv/cpu.h: spelling fix: separatly
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2023-11-15 12:06:05 +03:00 |
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crypto_helper.c
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target/riscv: Use accelerated helper for AES64KS1I
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2023-09-11 11:45:55 +10:00 |
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csr.c
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target/riscv: Don't assume PMU counters are continuous
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2023-11-07 11:06:02 +10:00 |
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debug.c
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target/riscv: Allocate itrigger timers only once
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2023-09-11 11:45:55 +10:00 |
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debug.h
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target/riscv: Allocate itrigger timers only once
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2023-09-11 11:45:55 +10:00 |
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fpu_helper.c
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riscv: Add support for the Zfa extension
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2023-07-10 22:29:20 +10:00 |
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gdbstub.c
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target/riscv: rename ext_icsr to ext_zicsr
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2023-11-07 11:02:17 +10:00 |
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helper.h
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target/riscv: Add Zvksed ISA extension support
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2023-09-11 11:45:55 +10:00 |
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insn16.decode
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insn32.decode
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target/riscv: Add Zvksed ISA extension support
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2023-09-11 11:45:55 +10:00 |
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instmap.h
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internals.h
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target/riscv: Use env_archcpu() in [check_]nanbox()
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2023-11-07 12:13:27 +01:00 |
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Kconfig
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m128_helper.c
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target/helpers: Remove unnecessary 'qemu/main-loop.h' header
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2023-08-31 19:47:43 +02:00 |
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machine.c
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target/riscv: Add "pmu-mask" property to replace "pmu-num"
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2023-11-07 11:06:02 +10:00 |
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meson.build
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target/riscv: move KVM only files to kvm subdir
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2023-10-12 12:20:24 +10:00 |
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monitor.c
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riscv: spelling fixes
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2023-09-08 13:08:52 +03:00 |
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op_helper.c
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target/helpers: Remove unnecessary 'qemu/main-loop.h' header
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2023-08-31 19:47:43 +02:00 |
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pmp.c
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target/riscv: pmp: Ignore writes when RW=01
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2023-11-07 11:06:02 +10:00 |
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pmp.h
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target/riscv: pmp: Clear pmp/smepmp bits on reset
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2023-11-07 11:06:02 +10:00 |
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pmu.c
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target/riscv: Add "pmu-mask" property to replace "pmu-num"
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2023-11-07 11:06:02 +10:00 |
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pmu.h
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target/riscv: Use existing PMU counter mask in FDT generation
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2023-11-07 11:06:02 +10:00 |
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riscv-qmp-cmds.c
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target/riscv/riscv-qmp-cmds.c: check CPU accel in query-cpu-model-expansion
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2023-11-07 11:06:02 +10:00 |
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sbi_ecall_interface.h
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time_helper.c
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time_helper.h
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trace-events
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trace.h
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translate.c
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accel/tcg: Replace CPUState.env_ptr with cpu_env()
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2023-10-04 11:03:54 -07:00 |
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vcrypto_helper.c
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target/riscv: Add Zvksed ISA extension support
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2023-09-11 11:45:55 +10:00 |
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vector_helper.c
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target/riscv: Fix vfwmaccbf16.vf
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2023-10-12 12:50:13 +10:00 |
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vector_internals.c
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target/riscv: Refactor some of the generic vector functionality
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2023-09-11 11:45:54 +10:00 |
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vector_internals.h
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target/riscv: Refactor some of the generic vector functionality
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2023-09-11 11:45:55 +10:00 |
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xthead.decode
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XVentanaCondOps.decode
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zce_helper.c
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3a4e56015b