qemu-e2k/target
Mark Cave-Ayland d59d1182b1 target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}()
Now that all VSX registers are stored in host endian order, there is no need
to go via different accessors depending upon the register number. Instead we
introduce vsr64_offset() and use it directly from within get_cpu_vsr{l,h}() and
set_cpu_vsr{l,h}().

This also allows us to rewrite avr64_offset() and fpr_offset() in terms of the
new vsr64_offset() function to more clearly express the relationship between the
VSX, FPR and VMX registers, and also remove vsrl_offset() which is no longer
required.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20190307180520.13868-8-mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-12 14:33:04 +11:00
..
alpha avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
arm kvm: add kvm_arm_get_max_vm_ipa_size 2019-03-05 15:55:09 +00:00
cris avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
hppa target/hppa: Optimize blr r0,rn 2019-03-07 17:43:12 -08:00
i386 i386: extended the cpuid_level when Intel PT is enabled 2019-03-11 16:33:49 +01:00
lm32
m68k target/m68k: Fix LGPL information in the file headers 2019-01-30 14:20:13 +01:00
microblaze target/microblaze: Add props enabling exceptions on failed bus accesses 2019-01-22 03:17:34 -08:00
mips target/mips: Preparing for adding MMI instructions 2019-02-27 14:26:14 +01:00
moxie target/moxie: Fix LGPL information in the file headers 2019-02-06 15:46:11 +01:00
nios2
openrisc target/openrisc: Fix LGPL version number 2019-01-30 11:01:36 +01:00
ppc target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() 2019-03-12 14:33:04 +11:00
riscv target/riscv: fix counter-enable checks in ctr() 2019-02-11 15:56:22 -08:00
s390x s390x/tcg: Implement VECTOR UNPACK * 2019-03-11 09:31:01 +01:00
sh4
sparc
tilegx avoid TABs in files that only contain a few 2019-01-11 15:46:56 +01:00
tricore tricore: fixed RCR_CADDN instruction 2019-03-08 10:00:59 +01:00
unicore32
xtensa target/xtensa: implement PREFCTL SR 2019-02-28 04:43:22 -08:00