e995d5cce4
The extension is primarily defined by the Linux kernel NT_ARM_PAC_MASK ptrace register set. The original gdb feature consists of two masks, data and code, which are used to mask out the authentication code within a pointer. Following discussion with Luis Machado, add two more masks in order to support pointers within the high half of the address space (i.e. TTBR1 vs TTBR0). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1105 Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230227213329.793795-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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aarch64-core.xml | ||
aarch64-fpu.xml | ||
aarch64-pauth.xml | ||
arm-core.xml | ||
arm-m-profile-mve.xml | ||
arm-m-profile.xml | ||
arm-neon.xml | ||
arm-vfp3.xml | ||
arm-vfp-sysregs.xml | ||
arm-vfp.xml | ||
avr-cpu.xml | ||
cf-core.xml | ||
cf-fp.xml | ||
i386-32bit.xml | ||
i386-64bit.xml | ||
loongarch-base64.xml | ||
loongarch-fpu.xml | ||
m68k-core.xml | ||
m68k-fp.xml | ||
microblaze-core.xml | ||
microblaze-stack-protect.xml | ||
power64-core.xml | ||
power-altivec.xml | ||
power-core.xml | ||
power-fpu.xml | ||
power-spe.xml | ||
power-vsx.xml | ||
riscv-32bit-cpu.xml | ||
riscv-32bit-fpu.xml | ||
riscv-32bit-virtual.xml | ||
riscv-64bit-cpu.xml | ||
riscv-64bit-fpu.xml | ||
riscv-64bit-virtual.xml | ||
rx-core.xml | ||
s390-acr.xml | ||
s390-cr.xml | ||
s390-fpr.xml | ||
s390-gs.xml | ||
s390-virt.xml | ||
s390-vx.xml | ||
s390x-core64.xml |