OpenE2K/qemu-e2k
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7924d239f4
qemu-e2k/target/arm
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Richard Henderson 7924d239f4 target/arm: Tidy do_ldrq 
Use tcg_constant_i32 for passing the simd descriptor,
as this hashed value does not need to be freed.
Rename dofs to doff to match poff.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210525010358.152808-78-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-05-25 16:01:44 +01:00
..
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
cpu64.c target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type 2021-05-25 16:01:43 +01:00
cpu_tcg.c Revert "target/arm: Make number of counters in PMCR follow the CPU" 2021-04-06 11:49:14 +01:00
cpu-param.h linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE 2021-02-16 13:06:16 +00:00
cpu-qom.h
cpu.c Do not include sysemu/sysemu.h if it's not really necessary 2021-05-02 17:24:50 +02:00
cpu.h target/arm: Implement SVE2 crypto constructive binary operations 2021-05-25 16:01:44 +01:00
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target/arm: Add wrapper macros for accessing tbflags 2021-04-30 11:16:50 +01:00
helper-a64.h target/arm: Merge mte_check1, mte_checkN 2021-04-30 11:16:49 +01:00
helper-sve.h target/arm: Implement SVE2 FLOGB 2021-05-25 16:01:44 +01:00
helper.c target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2 2021-05-25 16:01:43 +01:00
helper.h target/arm: Implement SVE mixed sign dot product 2021-05-25 16:01:44 +01:00
idau.h
internals.h target/arm: Rename mte_probe1 to mte_probe 2021-04-30 11:16:49 +01:00
iwmmxt_helper.c
kvm64.c target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2 2021-05-25 16:01:43 +01:00
kvm_arm.h hw/arm/virt: KVM: The IPA lower bound is 32 2021-03-12 12:47:11 +00:00
kvm-consts.h
kvm-stub.c
kvm.c hw/arm/virt: KVM: The IPA lower bound is 32 2021-03-12 12:47:11 +00:00
m_helper.c target/arm: Use correct SP in M-profile exception return 2021-05-25 16:01:43 +01:00
m-nocp.decode
machine.c target/arm: Don't migrate CPUARMState.features 2021-02-11 11:50:13 +00:00
meson.build target/arm: Make translate-neon.c.inc its own compilation unit 2021-05-10 13:24:09 +01:00
monitor.c target/arm: Add cpu properties to control pauth 2021-01-19 14:38:51 +00:00
mte_helper.c target/arm: Rename mte_probe1 to mte_probe 2021-04-30 11:16:49 +01:00
neon_helper.c target/arm: Split out saturating/rounding shifts from neon 2021-05-25 16:01:43 +01:00
neon-dp.decode
neon-ls.decode target/arm: Fix decode of align in VLDST_single 2021-04-30 11:16:49 +01:00
neon-shared.decode
op_addsub.h
op_helper.c target/arm: Make WFI a NOP for userspace emulators 2021-05-10 13:24:09 +01:00
pauth_helper.c target/arm: Implement an IMPDEF pauth algorithm 2021-01-19 14:38:51 +00:00
psci.c
sve_helper.c target/arm: Implement SVE2 FLOGB 2021-05-25 16:01:44 +01:00
sve.decode target/arm: Implement SVE2 FLOGB 2021-05-25 16:01:44 +01:00
syndrome.h target/arm: Split out syndrome.h from internals.h 2021-02-16 13:16:18 +00:00
t16.decode
t32.decode
tlb_helper.c target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill 2021-03-23 14:07:55 +00:00
trace-events
trace.h
translate-a32.h target/arm: Make translate-neon.c.inc its own compilation unit 2021-05-10 13:24:09 +01:00
translate-a64.c target/arm: Pass separate addend to FCMLA helpers 2021-05-25 16:01:44 +01:00
translate-a64.h target/arm: Implement SVE2 XAR 2021-05-25 16:01:44 +01:00
translate-m-nocp.c target/arm: Split m-nocp trans functions into their own file 2021-05-10 13:24:09 +01:00
translate-neon.c target/arm: Pass separate addend to FCMLA helpers 2021-05-25 16:01:44 +01:00
translate-sve.c target/arm: Tidy do_ldrq 2021-05-25 16:01:44 +01:00
translate-vfp.c target/arm: Make translate-vfp.c.inc its own compilation unit 2021-05-10 13:24:09 +01:00
translate.c target/arm: Make sure that commpage's tb->size != 0 2021-05-20 14:19:30 +02:00
translate.h target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h 2021-05-10 13:24:09 +01:00
vec_helper.c target/arm: Implement SVE mixed sign dot product 2021-05-25 16:01:44 +01:00
vec_internal.h target/arm: Implement SVE2 complex integer multiply-add 2021-05-25 16:01:44 +01:00
vfp_helper.c
vfp-uncond.decode
vfp.decode