Richard Henderson 9ad2ba6e8e target/i386: Fix BZHI instruction ... We did not correctly handle N >= operand size. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1374 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230114233206.3118472-1-richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2023-02-27 09:18:55 +01:00
..
sysemu	target/i386: Always completely initialize TranslateFault	2022-12-01 09:53:24 +01:00
user	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
bpt_helper.c	compiler.h: replace QEMU_NORETURN with G_NORETURN	2022-04-21 17:03:51 +04:00
cc_helper_template.h
cc_helper.c	target/i386: Expand eflags updates inline	2022-11-01 08:31:41 +11:00
decode-new.c.inc	target/i386: fix operand size of unary SSE operations	2023-01-11 10:44:35 +01:00
decode-new.h	target/i386: implement FMA instructions	2022-10-22 09:05:54 +02:00
emit.c.inc	target/i386: Fix BZHI instruction	2023-02-27 09:18:55 +01:00
excp_helper.c	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
fpu_helper.c	target/i386: introduce function to set rounding mode from FPCW or MXCSR bits	2022-10-20 15:16:13 +02:00
helper-tcg.h	target/i386: Raise #GP on unaligned m128 accesses when required.	2022-09-18 09:17:40 +02:00
int_helper.c
mem_helper.c	target/i386: Inline cmpxchg16b	2023-02-04 06:19:43 -10:00
meson.build
misc_helper.c	compiler.h: replace QEMU_NORETURN with G_NORETURN	2022-04-21 17:03:51 +04:00
mpx_helper.c
seg_helper.c	i386: Emit correct error code for 64-bit IDT entry	2023-01-11 09:59:38 +01:00
seg_helper.h
tcg-cpu.c	target/i386: Convert to tcg_ops restore_state_to_opc	2022-10-26 11:11:28 +10:00
tcg-cpu.h
tcg-stub.c
translate.c	target/i386: Inline cmpxchg16b	2023-02-04 06:19:43 -10:00