Chris Rauer a0eaa126af hw/ssi: Fix Linux driver init issue with xilinx_spi ... The problem is that the Linux driver expects the master transaction inhibit bit(R_SPICR_MTI) to be set during driver initialization so that it can detect the fifo size but QEMU defaults it to zero out of reset. The datasheet indicates this bit is active on reset. See page 25, SPI Control Register section: https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf Signed-off-by: Chris Rauer <crauer@google.com> Message-id: 20230323182811.2641044-1-crauer@google.com Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2023-04-03 16:12:30 +01:00
..
aspeed_smc.c	aspeed/smc: Replace SysBus IRQs with GPIO lines	2023-03-02 13:57:50 +01:00
ibex_spi_host.c	include/hw: Do not include "hw/registerfields.h" in headers that don't need it	2023-02-14 09:02:42 +01:00
imx_spi.c	hw/ssi: imx_spi: Correct tx and rx fifo endianness	2021-02-02 17:00:55 +00:00
Kconfig	hw/ssi: Add SiFive SPI controller support	2021-03-04 09:43:29 -05:00
meson.build	hw/ssi: Add Nuvoton PSPI Module	2023-02-16 16:00:48 +00:00
mss-spi.c
npcm7xx_fiu.c	hw/*: Use type casting for SysBusDevice in NPCM7XX	2021-01-12 21:19:02 +00:00
npcm_pspi.c	hw/ssi: Add Nuvoton PSPI Module	2023-02-16 16:00:48 +00:00
omap_spi.c	hw/arm/omap: Drop useless casts from void * to pointer	2023-01-12 17:15:09 +00:00
pl022.c	hw/ssi: Rename SSI 'slave' as 'peripheral'	2020-12-10 12:15:03 -05:00
sifive_spi.c	hw/ssi/sifive_spi.c: spelling: reigster	2023-01-17 10:02:37 +01:00
ssi.c	ssi: cache SSIPeripheralClass to avoid GET_CLASS()	2022-10-24 11:20:15 +02:00
stm32f2xx_spi.c
trace-events	hw/ssi: Add Nuvoton PSPI Module	2023-02-16 16:00:48 +00:00
trace.h
xilinx_spi.c	hw/ssi: Fix Linux driver init issue with xilinx_spi	2023-04-03 16:12:30 +01:00
xilinx_spips.c	bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx	2023-01-18 11:14:34 +01:00
xlnx-versal-ospi.c	migration: Remove load_state_old and minimum_version_id_old	2022-03-02 18:20:45 +00:00