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8708a04a61
qemu-e2k/target/loongarch
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Song Gao 8708a04a61 target/loongarch: Add fixed point extra instruction translation 
This includes:
- CRC[C].W.{B/H/W/D}.W
- SYSCALL
- BREAK
- ASRT{LE/GT}.D
- RDTIME{L/H}.W, RDTIME.D
- CPUCFG

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-10-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-06 18:09:03 +00:00
..
insn_trans target/loongarch: Add fixed point extra instruction translation 2022-06-06 18:09:03 +00:00
cpu-param.h
cpu.c
cpu.h
helper.h target/loongarch: Add fixed point extra instruction translation 2022-06-06 18:09:03 +00:00
insns.decode target/loongarch: Add fixed point extra instruction translation 2022-06-06 18:09:03 +00:00
internals.h
op_helper.c target/loongarch: Add fixed point extra instruction translation 2022-06-06 18:09:03 +00:00
README
translate.c target/loongarch: Add fixed point extra instruction translation 2022-06-06 18:09:03 +00:00
translate.h target/loongarch: Add fixed point arithmetic instruction translation 2022-06-06 18:09:03 +00:00

README 

- Introduction

  LoongArch is the general processor architecture of Loongson.

  The following versions of the LoongArch core are supported
    core: 3A5000
    https://github.com/loongson/LoongArch-Documentation/releases/download/2021.08.17/LoongArch-Vol1-v1.00-EN.pdf

  We can get the latest loongarch documents at https://github.com/loongson/LoongArch-Documentation/tags.