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89854803ce
qemu-e2k/hw/riscv
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Michael Clark 89854803ce
RISC-V: Remove EM_RISCV ELF_MACHINE indirection 
Pointless indirection. Other ports use EM_ constants directly.

Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Michael Clark <mjc@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2018-05-06 10:39:38 +12:00
..
Makefile.objs RISC-V Build Infrastructure 2018-03-07 08:30:28 +13:00
riscv_hart.c RISC-V: Remove unused class definitions 2018-05-06 10:39:38 +12:00
riscv_htif.c
sifive_clint.c RISC-V: Replace hardcoded constants with enum values 2018-05-06 10:39:38 +12:00
sifive_e.c RISC-V: Remove EM_RISCV ELF_MACHINE indirection 2018-05-06 10:39:38 +12:00
sifive_plic.c SiFive RISC-V PLIC Block 2018-03-07 08:30:28 +13:00
sifive_prci.c SiFive RISC-V PRCI Block 2018-03-07 08:30:28 +13:00
sifive_test.c SiFive RISC-V Test Finisher 2018-03-07 08:30:28 +13:00
sifive_u.c RISC-V: Remove EM_RISCV ELF_MACHINE indirection 2018-05-06 10:39:38 +12:00
sifive_uart.c SiFive RISC-V UART Device 2018-03-07 08:30:28 +13:00
spike.c RISC-V: Remove EM_RISCV ELF_MACHINE indirection 2018-05-06 10:39:38 +12:00
virt.c RISC-V: Remove EM_RISCV ELF_MACHINE indirection 2018-05-06 10:39:38 +12:00