8ec1e4f1ef
We rely on the phb-id and chip-id, which are PHB properties, to assign chassis and slot to the root port. For default devices this is no big deal: the root port is being created under pnv_phb_realize() and the values are being passed on via the 'index' and 'chip-id' of the pnv_phb_attach_root_port() helper. If we want to implement user created root ports we have a problem. The user created root port will not be aware of which PHB it belongs to, unless we're willing to violate QOM best practices and access the PHB via dev->parent_bus->parent. What we can do is to access the root bus parent bus. Since we're already assigning the root port as QOM child of the bus, and the bus is initiated using PHB properties, let's add phb-id and chip-id as properties of the bus. This will allow us trivial access to them, for both user-created and default root ports, without doing anything too shady with QOM. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-Id: <20220811163950.578927-2-danielhb413@gmail.com> |
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bonito.c | ||
designware.c | ||
dino.c | ||
gpex-acpi.c | ||
gpex.c | ||
grackle.c | ||
i440fx.c | ||
Kconfig | ||
meson.build | ||
mv643xx.h | ||
mv64361.c | ||
pam.c | ||
pnv_phb3_msi.c | ||
pnv_phb3_pbcq.c | ||
pnv_phb3.c | ||
pnv_phb4_pec.c | ||
pnv_phb4.c | ||
pnv_phb.c | ||
pnv_phb.h | ||
ppce500.c | ||
q35.c | ||
raven.c | ||
remote.c | ||
sabre.c | ||
sh_pci.c | ||
trace-events | ||
trace.h | ||
uninorth.c | ||
versatile.c | ||
xen_igd_pt.c | ||
xilinx-pcie.c |