Max Filippov 4be4c5b826 tests/tcg/xtensa: fix vectors and checks in timer test ... Timer test assumes that timer 0 IRQ has level 1 and other timers have higher level IRQs. This assumption is not correct and the levels may be arbitrary. Fix that assumption by providing TIMER*_VECTOR macro and using it for vector selection and by making the check for the timer exception cause conditional. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2022-05-06 15:27:40 -07:00
..
crt.S	tests/tcg/xtensa: fix build for cores without windowed registers	2022-05-06 15:27:40 -07:00
fpu.h	tests/tcg/xtensa: update test_fp0_arith for DFPU	2020-08-21 12:48:15 -07:00
linker.ld.S
macros.inc	tests/tcg/xtensa: fix test execution on ISS	2020-08-21 12:48:15 -07:00
Makefile.softmmu-target	Replace TARGET_WORDS_BIGENDIAN	2022-04-06 10:50:37 +02:00
test_b.S
test_bi.S
test_boolean.S
test_break.S	tests/tcg/xtensa: fix watchpoint test	2022-05-06 15:27:40 -07:00
test_bz.S
test_cache.S
test_clamps.S
test_dfp0_arith.S	tests/tcg/xtensa: add DFP0 arithmetic tests	2020-08-21 12:48:16 -07:00
test_exclusive.S
test_extui.S
test_flix.S
test_fp0_arith.S	tests/tcg/xtensa: expand madd tests	2020-08-21 12:48:15 -07:00
test_fp0_conv.S	tests/tcg/xtensa: update test_fp0_conv for DFPU	2020-08-21 12:48:16 -07:00
test_fp0_div.S	tests/tcg/xtensa: add fp0 div and sqrt tests	2020-08-21 12:48:16 -07:00
test_fp0_sqrt.S	tests/tcg/xtensa: add fp0 div and sqrt tests	2020-08-21 12:48:16 -07:00
test_fp1.S	tests/tcg/xtensa: update test_fp1 for DFPU	2020-08-21 12:48:16 -07:00
test_fp_cpenable.S
test_interrupt.S
test_load_store.S	target/xtensa: clean up unaligned access	2021-05-20 13:02:58 -07:00
test_loop.S
test_lsc.S	tests/tcg/xtensa: test double precision load/store	2020-08-21 12:48:16 -07:00
test_mac16.S
test_max.S
test_min.S
test_mmu.S	tests/tcg/xtensa: enable mmu tests for MMUv3	2022-05-06 15:27:40 -07:00
test_mul16.S
test_mul32.S
test_nsa.S
test_phys_mem.S	tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3	2022-05-06 15:27:40 -07:00
test_quo.S
test_rem.S
test_rst0.S
test_s32c1i.S
test_sar.S
test_sext.S
test_shift.S
test_sr.S	tests/tcg/xtensa: restore vecbase SR after test	2022-05-06 15:27:40 -07:00
test_timer.S	tests/tcg/xtensa: fix vectors and checks in timer test	2022-05-06 15:27:40 -07:00
test_windowed.S
vectors.S