Bin Meng 8f2ac39d5d hw/riscv: microchip_pfsoc: Connect 5 MMUARTs ... Microchip PolarFire SoC has 5 MMUARTs, and the Icicle Kit board wires 4 of them out. Let's connect all 5 MMUARTs. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-7-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2020-09-09 15:54:18 -07:00
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boot.c
Kconfig	hw/riscv: microchip_pfsoc: Connect 5 MMUARTs	2020-09-09 15:54:18 -07:00
meson.build	hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board	2020-09-09 15:54:18 -07:00
microchip_pfsoc.c	hw/riscv: microchip_pfsoc: Connect 5 MMUARTs	2020-09-09 15:54:18 -07:00
numa.c
opentitan.c	target/riscv: cpu: Set reset vector based on the configured property value	2020-09-09 15:54:18 -07:00
riscv_hart.c
riscv_htif.c
sifive_clint.c
sifive_e_prci.c
sifive_e.c	target/riscv: cpu: Set reset vector based on the configured property value	2020-09-09 15:54:18 -07:00
sifive_gpio.c
sifive_plic.c
sifive_test.c
sifive_u_otp.c
sifive_u_prci.c
sifive_u.c	target/riscv: cpu: Set reset vector based on the configured property value	2020-09-09 15:54:18 -07:00
sifive_uart.c
spike.c
trace-events
trace.h
virt.c