Cédric Le Goater 91137619c6 target/ppc: Add extra float instructions to POWER5P processors ... ISA v2.03 introduced Floating Round to Integer instructions : frin, friz, frip, and frim. Add them to POWER5+. The PPC_FLOAT_EXT flag also includes the fre (Floating Reciprocal Estimate) instruction which was introduced in ISA v2.0x. The architecture document says its optional and that might be the reason why it has been kept under the PPC_FLOAT_EXT flag. This means 970 CPUs can not use it under QEMU, which doesn't seem to be a problem. Signed-off-by: Cédric Le Goater <clg@kaod.org>		2022-01-12 11:28:26 +01:00
..
translate	exec/memop: Adding signedness to quad definitions	2022-01-08 15:46:10 +10:00
arch_dump.c
compat.c
cpu_init.c	target/ppc: Add extra float instructions to POWER5P processors	2022-01-12 11:28:26 +01:00
cpu-models.c	target/ppc: remove 401/403 CPUs	2021-12-17 17:57:16 +01:00
cpu-models.h	target/ppc: remove 401/403 CPUs	2021-12-17 17:57:16 +01:00
cpu-param.h
cpu-qom.h	target/ppc: remove 401/403 CPUs	2021-12-17 17:57:16 +01:00
cpu.c	target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52	2021-12-17 17:57:13 +01:00
cpu.h	target/ppc: Cache per-pmc insn and cycle count settings	2022-01-04 07:55:34 +01:00
dfp_helper.c	target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree	2021-11-09 10:32:52 +11:00
excp_helper.c	target/ppc: powerpc_excp: Stop passing excp_model around	2022-01-04 07:55:34 +01:00
fpu_helper.c	target/ppc: do not silence snan in xscvspdpn	2022-01-04 07:55:34 +01:00
gdbstub.c	target/ppc: Fix XER access in gdbstub	2021-10-21 11:42:47 +11:00
helper_regs.c	target/ppc: Cache per-pmc insn and cycle count settings	2022-01-04 07:55:34 +01:00
helper_regs.h
helper.h	ppc/ppc405: Restore TCR and STR write handlers	2022-01-04 07:55:34 +01:00
insn32.decode	PPC64/TCG: Implement 'rfebb' instruction	2021-12-17 17:57:19 +01:00
insn64.decode	target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions	2021-11-09 10:32:53 +11:00
int_helper.c	target/ppc: Implement xxblendvb/xxblendvh/xxblendvw/xxblendvd instructions	2021-11-09 10:32:53 +11:00
internal.h	target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu	2021-11-02 07:00:52 -04:00
Kconfig
kvm_ppc.h
kvm-stub.c
kvm.c
machine.c	target/ppc: Cache per-pmc insn and cycle count settings	2022-01-04 07:55:34 +01:00
mem_helper.c	accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h	2021-10-13 08:14:54 -07:00
meson.build	target/ppc: introduce PMUEventType and PMU overflow timers	2021-12-17 17:57:18 +01:00
mfrom_table_gen.c
mfrom_table.c.inc
misc_helper.c
mmu_common.c	ppc/ppc405: Activate MMU logs	2022-01-04 07:55:34 +01:00
mmu_helper.c	ppc/ppc405: Activate MMU logs	2022-01-04 07:55:34 +01:00
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-books.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c	target/ppc: fix Hash64 MMU update of PTE bit R	2021-11-29 21:00:08 +01:00
mmu-hash64.h	target/ppc: fix Hash64 MMU update of PTE bit R	2021-11-29 21:00:08 +01:00
mmu-radix64.c	target/ppc: Check effective address validity	2022-01-04 07:55:34 +01:00
mmu-radix64.h	target/ppc: Check effective address validity	2022-01-04 07:55:34 +01:00
monitor.c	target/ppc: Fix XER access in monitor	2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc	target/ppc: enable PMU instruction count	2021-12-17 17:57:18 +01:00
power8-pmu.c	target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0()	2022-01-04 07:55:35 +01:00
power8-pmu.h	target/ppc: Cache per-pmc insn and cycle count settings	2022-01-04 07:55:34 +01:00
spr_tcg.h	ppc/ppc405: Introduce a store helper for SPR_40x_PID	2022-01-04 07:55:34 +01:00
tcg-stub.c
timebase_helper.c	ppc/ppc405: Restore TCR and STR write handlers	2022-01-04 07:55:34 +01:00
trace-events	target/ppc: Convert debug to trace events (exceptions)	2021-09-30 12:26:06 +10:00
trace.h
translate.c	exec/memop: Adding signedness to quad definitions	2022-01-08 15:46:10 +10:00
user_only_helper.c	target/ppc: Implement ppc_cpu_record_sigsegv	2021-11-02 07:00:52 -04:00