qemu-e2k/target/arm
Richard Henderson 0ca0f8720a target/arm: Enforce alignment for sve LD1R
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210419202257.161730-32-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-04-30 11:16:51 +01:00
..
a32-uncond.decode
a32.decode
arch_dump.c
arm_ldst.h
arm-powerctl.c
arm-powerctl.h
cpu64.c Revert "target/arm: Make number of counters in PMCR follow the CPU" 2021-04-06 11:49:14 +01:00
cpu_tcg.c Revert "target/arm: Make number of counters in PMCR follow the CPU" 2021-04-06 11:49:14 +01:00
cpu-param.h
cpu-qom.h
cpu.c target/arm: Make M-profile VTOR loads on reset handle memory aliasing 2021-03-23 11:47:31 +00:00
cpu.h target/arm: Add ALIGN_MEM to TBFLAG_ANY 2021-04-30 11:16:50 +01:00
crypto_helper.c
debug_helper.c
gdbstub64.c
gdbstub.c
helper-a64.c target/arm: Add wrapper macros for accessing tbflags 2021-04-30 11:16:50 +01:00
helper-a64.h target/arm: Merge mte_check1, mte_checkN 2021-04-30 11:16:49 +01:00
helper-sve.h
helper.c target/arm: Add ALIGN_MEM to TBFLAG_ANY 2021-04-30 11:16:50 +01:00
helper.h
idau.h
internals.h target/arm: Rename mte_probe1 to mte_probe 2021-04-30 11:16:49 +01:00
iwmmxt_helper.c
kvm64.c Revert "target/arm: Make number of counters in PMCR follow the CPU" 2021-04-06 11:49:14 +01:00
kvm_arm.h hw/arm/virt: KVM: The IPA lower bound is 32 2021-03-12 12:47:11 +00:00
kvm-consts.h
kvm-stub.c
kvm.c hw/arm/virt: KVM: The IPA lower bound is 32 2021-03-12 12:47:11 +00:00
m_helper.c
m-nocp.decode
machine.c
meson.build
monitor.c
mte_helper.c target/arm: Rename mte_probe1 to mte_probe 2021-04-30 11:16:49 +01:00
neon_helper.c
neon-dp.decode
neon-ls.decode target/arm: Fix decode of align in VLDST_single 2021-04-30 11:16:49 +01:00
neon-shared.decode
op_addsub.h
op_helper.c
pauth_helper.c
psci.c
sve_helper.c target/arm: Simplify sve mte checking 2021-04-30 11:16:49 +01:00
sve.decode
syndrome.h
t16.decode
t32.decode
tlb_helper.c target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill 2021-03-23 14:07:55 +00:00
trace-events
trace.h
translate-a64.c target/arm: Enforce alignment for aa64 vector LDn/STn (single) 2021-04-30 11:16:51 +01:00
translate-a64.h target/arm: Remove log2_esize parameter to gen_mte_checkN 2021-04-30 11:16:49 +01:00
translate-neon.c.inc target/arm: Enforce alignment for VLDn/VSTn (single) 2021-04-30 11:16:51 +01:00
translate-sve.c target/arm: Enforce alignment for sve LD1R 2021-04-30 11:16:51 +01:00
translate-vfp.c.inc target/arm: Enforce alignment for VLDR/VSTR 2021-04-30 11:16:51 +01:00
translate.c target/arm: Enforce alignment for VLDn (all lanes) 2021-04-30 11:16:51 +01:00
translate.h target/arm: Enforce alignment for VLDn (all lanes) 2021-04-30 11:16:51 +01:00
vec_helper.c
vec_internal.h
vfp_helper.c
vfp-uncond.decode
vfp.decode