qemu-e2k/target/mips
Peter Maydell c08dfb7ae2 target/mips: Convert to 3-phase reset
Convert the mips CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-11-peter.maydell@linaro.org
2022-12-16 15:58:15 +00:00
..
sysemu
tcg cleanup: Tweak and re-run return_directly.cocci 2022-12-14 16:19:35 +01:00
cpu-defs.c.inc target/mips: Disable DSP ASE for Octeon68XX 2022-11-08 01:04:25 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target/mips: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/mips: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.h target/mips: Use an exception for semihosting 2022-06-28 10:13:42 +05:30
fpu_helper.h
fpu.c
gdbstub.c
helper.h target/mips: Extract NEC Vr54xx helper definitions 2021-08-25 13:02:14 +02:00
internal.h MIPS patches queue 2022-03-09 09:13:39 +00:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm_mips.h
kvm.c kvm: allow target-specific accelerator properties 2022-10-10 09:23:16 +02:00
meson.build
mips-defs.h target/mips: introduce decodetree structure for Cavium Octeon extension 2022-07-12 22:30:09 +02:00
msa.c