qemu-e2k/target
Taylor Simpson 9a65990326 Hexagon (target/hexagon) properly set FPINVF bit in sfcmp.uo and dfcmp.uo
Instead of checking for nan arguments, use float??_unordered_quiet

test cases added in a subsequent patch to more extensively test USR bits

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <20220210021556.9217-4-tsimpson@quicinc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-03-12 09:14:22 -08:00
..
alpha target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
arm target-arm queue: 2022-03-08 15:26:10 +00:00
avr target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
cris target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
hexagon Hexagon (target/hexagon) properly set FPINVF bit in sfcmp.uo and dfcmp.uo 2022-03-12 09:14:22 -08:00
hppa target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
i386 target-arm queue: 2022-03-08 15:26:10 +00:00
m68k target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
microblaze target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
mips MIPS patches queue 2022-03-09 09:13:39 +00:00
nios2 target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
openrisc target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
ppc target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
riscv target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
rx target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
s390x target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
sh4 target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
sparc target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
tricore target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
xtensa target: Use ArchCPU as interface to target CPU 2022-03-06 22:23:09 +01:00
Kconfig
meson.build