qemu-e2k/target/mips
Dragan Mladjenovic 9e4f726d4f target/mips: Fix emulation of nanoMIPS EXTRV_S.H instruction
The field rs in the instruction EXTRV_S.H rt, ac, rs is specified in
nanoMIPS documentation as opcode[20..16]. It is, however, erroneously
considered as opcode[25..21] in the current QEMU implementation. In
function gen_pool32axf_2_nanomips_insn(), the variable v0_t corresponds
to rt/opcode[25..21], and v1_t corresponds to rs/opcode[20..16]), and
v0_t is by mistake passed to the helper gen_helper_extr_s_h().

Use v1_t rather than v0_t in the invocation of gen_helper_extr_s_h()
to fix this.

Signed-off-by: Dragan Mladjenovic <dragan.mladjenovic@syrmia.com>
Signed-off-by: Stefan Pejic <stefan.pejic@syrmia.com>
Fixes: 8b3698b294 ("target/mips: Add emulation of DSP ASE for nanoMIPS")
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220504110403.613168-3-stefan.pejic@syrmia.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2022-06-11 11:35:34 +02:00
..
sysemu
tcg target/mips: Fix emulation of nanoMIPS EXTRV_S.H instruction 2022-06-11 11:35:34 +02:00
cpu-defs.c.inc target/mips: Remove obsolete FCR0_HAS2008 comment on P5600 CPU 2021-11-02 14:32:32 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/mips: Fix WatchHi.M handling 2022-06-11 11:34:12 +02:00
cpu.h target/mips: Fix WatchHi.M handling 2022-06-11 11:34:12 +02:00
fpu_helper.h
fpu.c
gdbstub.c
helper.h
internal.h MIPS patches queue 2022-03-09 09:13:39 +00:00
Kconfig
kvm_mips.h
kvm.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
meson.build
mips-defs.h
msa.c