qemu-e2k/target/hppa
Richard Henderson fa71b4f84f target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40
This is the value that is supported by both PA-8500 and Astro.
If we support a larger address space than expected, we trip up
software that did not fill in all of the page table bits,
expecting them to be ignored.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-11-13 09:21:32 -08:00
..
cpu-param.h target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 2023-11-13 09:21:32 -08:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu.c target/hppa: Add unwind_breg to CPUHPPAState 2023-11-06 18:49:34 -08:00
cpu.h target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDX 2023-11-13 09:20:43 -08:00
fpu_helper.c
gdbstub.c
helper.c
helper.h target/hppa: Add pa2.0 cpu local tlb flushes 2023-11-06 18:49:34 -08:00
insns.decode target/hppa: Add pa2.0 cpu local tlb flushes 2023-11-06 18:49:34 -08:00
int_helper.c target/hppa: Fix calculation of CR_IIASQ back register 2023-11-13 09:17:07 -08:00
Kconfig
machine.c
mem_helper.c target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 2023-11-13 09:21:32 -08:00
meson.build
op_helper.c target/hppa: Use PRIV_P_TO_MMU_IDX in helper_probe 2023-11-13 09:17:07 -08:00
sys_helper.c target/hppa: Update IIAOQ, IIASQ for pa2.0 2023-11-06 18:49:34 -08:00
trace-events target/hppa: Add pa2.0 cpu local tlb flushes 2023-11-06 18:49:34 -08:00
trace.h
translate.c target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDX 2023-11-13 09:20:43 -08:00