OpenE2K/qemu-e2k
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qemu-e2k/target
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Stefan Hajnoczi 3b06e4058d target-arm queue: 
* hw/arm/virt: fix GIC maintenance IRQ registration
  * target/arm: HVC at EL3 should go to EL3, not EL2
  * target/arm: Correct MTE tag checking for reverse-copy MOPS
  * target/arm/tcg: enable PMU feature for Cortex-A8 and A9
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Merge tag 'pull-target-arm-20231113' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/arm/virt: fix GIC maintenance IRQ registration
 * target/arm: HVC at EL3 should go to EL3, not EL2
 * target/arm: Correct MTE tag checking for reverse-copy MOPS
 * target/arm/tcg: enable PMU feature for Cortex-A8 and A9

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# gpg: Signature made Mon 13 Nov 2023 12:45:33 EST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20231113' of https://git.linaro.org/people/pmaydell/qemu-arm:
  target/arm/tcg: enable PMU feature for Cortex-A8 and A9
  target/arm: Correct MTE tag checking for reverse-copy MOPS
  target/arm: HVC at EL3 should go to EL3, not EL2
  hw/arm/virt: fix GIC maintenance IRQ registration

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2023-11-14 10:49:02 -05:00
..
alpha hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
arm target/arm/tcg: enable PMU feature for Cortex-A8 and A9 2023-11-13 16:31:41 +00:00
avr hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
cris hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
hexagon hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
hppa target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40 2023-11-13 09:21:32 -08:00
i386 Misc hardware patch queue 2023-11-08 08:32:26 +08:00
loongarch hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
m68k hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
microblaze target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
mips target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
nios2 target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
openrisc hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
ppc target/ppc: Move powerpc_input_t definition to 'cpu.h' 2023-11-07 12:13:28 +01:00
riscv hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
rx hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
s390x * Fix s390x CPU reconfiguration information in the SCLP facility map 2023-11-08 20:34:36 +08:00
sh4 hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
sparc target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
tricore hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
xtensa hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() 2023-11-07 13:08:48 +01:00
Kconfig
meson.build