qemu-e2k/target
Stephen Michael Jothen 9f9dcb96a4 target/i386/tcg: Fix masking of real-mode addresses with A20 bit
The correct A20 masking is done if paging is enabled (protected mode) but it
seems to have been forgotten in real mode. For example from the AMD64 APM Vol. 2
section 1.2.4:

> If the sum of the segment base and effective address carries over into bit 20,
> that bit can be optionally truncated to mimic the 20-bit address wrapping of the
> 8086 processor by using the A20M# input signal to mask the A20 address bit.

Most BIOSes will enable the A20 line on boot, but I found by disabling the A20 line
afterwards, the correct wrapping wasn't taking place.

`handle_mmu_fault' in target/i386/tcg/sysemu/excp_helper.c seems to be the culprit.
In real mode, it fills the TLB with the raw unmasked address. However, for the
protected mode, the `mmu_translate' function does the correct A20 masking.

The fix then should be to just apply the A20 mask in the first branch of the if
statement.

Signed-off-by: Stephen Michael Jothen <sjothen@gmail.com>
Message-Id: <Yo5MUMSz80jXtvt9@air-old.local>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-06-06 09:26:53 +02:00
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm target/arm: Remove aa64_sve check from before disas_sve 2022-05-30 17:05:12 +01:00
avr Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 target/i386/tcg: Fix masking of real-mode addresses with A20 bit 2022-06-06 09:26:53 +02:00
m68k target/m68k: Mark helper_raise_exception as noreturn 2022-06-02 09:35:03 +02:00
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
nios2 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc target/ppc: Implemented [pm]xvbf16ger2* 2022-05-26 17:11:33 -03:00
riscv target/riscv: add zicsr/zifencei to isa_string 2022-05-24 10:38:50 +10:00
rx Fix usp/isp swapping upon clrpsw/setpsw. 2022-04-21 16:45:41 -07:00
s390x target/s390x: kvm: Honor storage keys during emulation 2022-06-03 08:03:28 +02:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00