qianfan Zhao 8461bfdca9 hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs ... TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect) register on SUN6i based SoCs, we should lower interrupt when the guest set this bit. The linux kernel will hang in irq handler(mv64xxx_i2c_intr) if no device connected on the i2c bus, next is the trace log: allwinner_i2c_write write CNTR(0x0c): 0xc4 A_ACK BUS_EN INT_EN allwinner_i2c_write write CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read STAT(0x10): 0x20 STAT_M_ADDR_WR_NACK allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE ... Fix it. Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Tested-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2023-03-06 14:08:12 +00:00
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allwinner-i2c.c	hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs	2023-03-06 14:08:12 +00:00
arm_sbcon_i2c.c
aspeed_i2c.c	hw/i2c: only schedule pending master when bus is idle	2023-03-02 13:57:50 +01:00
bitbang_i2c.c
core.c	hw/i2c: only schedule pending master when bus is idle	2023-03-02 13:57:50 +01:00
exynos4210_i2c.c
i2c_mux_pca954x.c
imx_i2c.c
Kconfig
meson.build
microbit_i2c.c
mpc_i2c.c
npcm7xx_smbus.c
omap_i2c.c
pm_smbus.c
pmbus_device.c
ppc4xx_i2c.c
smbus_eeprom.c
smbus_ich9.c	hw: Move ich9.h to southbridge/	2023-02-27 22:29:01 +01:00
smbus_master.c
smbus_slave.c
trace-events
trace.h