qemu-e2k

History

Thomas Huth 35c7f5254b target/riscv/vector_helper: Fix build on 32-bit big endian hosts

The code currently fails to compile on 32-bit big endian hosts:

 target/riscv/vector_helper.c: In function 'vext_clear':
 target/riscv/vector_helper.c:154:16: error: cast to pointer from integer
 of different size [-Werror=int-to-pointer-cast]
         memset((void *)((uintptr_t)tail & ~(7ULL)), 0, part1);
                ^
 target/riscv/vector_helper.c:155:16: error: cast to pointer from integer
 of different size [-Werror=int-to-pointer-cast]
         memset((void *)(((uintptr_t)tail + 8) & ~(7ULL)), 0, part2);
                ^
 cc1: all warnings being treated as errors

We should not use "long long" (i.e. 64-bit) values here to avoid the
problem. Switch to our QEMU_ALIGN_PTR_DOWN/UP macros instead.

Fixes: 751538d5da ("add vector stride load and store instructions")
Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20200804170055.2851-3-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>

2020-08-05 10:43:45 +02:00

insn_trans

target/riscv: fix vector index load/store constraints

2020-07-22 09:39:46 -07:00

cpu_bits.h

target/riscv: support vector extension csr

2020-07-02 09:19:32 -07:00

cpu_helper.c

target/riscv: Report errors validating 2nd-stage PTEs

2020-06-19 08:24:07 -07:00

cpu_user.h

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