qemu-e2k/hw/riscv
Michael Clark a7240d1e4a
SiFive Freedom U Series RISC-V Machine
This provides a RISC-V Board compatible with the the SiFive Freedom U SDK.
The following machine is implemented:

- 'sifive_u'; CLINT, PLIC, UART, device-tree

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
2018-03-07 08:30:28 +13:00
..
riscv_hart.c
riscv_htif.c
sifive_clint.c SiFive RISC-V CLINT Block 2018-03-07 08:30:28 +13:00
sifive_e.c SiFive Freedom E Series RISC-V Machine 2018-03-07 08:30:28 +13:00
sifive_plic.c SiFive RISC-V PLIC Block 2018-03-07 08:30:28 +13:00
sifive_prci.c SiFive RISC-V PRCI Block 2018-03-07 08:30:28 +13:00
sifive_test.c SiFive RISC-V Test Finisher 2018-03-07 08:30:28 +13:00
sifive_u.c SiFive Freedom U Series RISC-V Machine 2018-03-07 08:30:28 +13:00
sifive_uart.c SiFive RISC-V UART Device 2018-03-07 08:30:28 +13:00
spike.c RISC-V Spike Machines 2018-03-07 08:30:28 +13:00
virt.c RISC-V VirtIO Machine 2018-03-07 08:30:28 +13:00