Edgar E. Iglesias ab6dd3808d target-microblaze: dec_msr: Fix MTS to FSR ... Fix moves to FSR. Not only bit 31 is accessible. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>		2018-05-29 09:35:14 +02:00
..
cpu-qom.h
cpu.c	target-microblaze: Conditionalize setting of PVR11_USE_MMU	2018-05-29 09:33:52 +02:00
cpu.h	target-microblaze: Use TCGv for load/store addresses	2018-05-29 09:35:13 +02:00
gdbstub.c
helper.c	target-microblaze: Bypass MMU with MMU_NOMMU_IDX	2018-05-29 09:35:13 +02:00
helper.h	target-microblaze: Use TCGv for load/store addresses	2018-05-29 09:35:13 +02:00
Makefile.objs
microblaze-decode.h
mmu.c	target-microblaze: mmu: Make the TLBX MISS bit read-only	2018-04-30 16:43:20 +02:00
mmu.h
op_helper.c	target-microblaze: Use TCGv for load/store addresses	2018-05-29 09:35:13 +02:00
translate.c	target-microblaze: dec_msr: Fix MTS to FSR	2018-05-29 09:35:14 +02:00