qemu-e2k/hw/intc
Peter Maydell 90feffad2a hw/intc/arm_gicv3: fix handling of LPIs in list registers
It is valid for an OS to put virtual interrupt ID values into the
list registers ICH_LR<n> which are greater than 1023.  This
corresponds to (for example) KVM using the in-kernel emulated ITS to
give a (nested) guest an ITS.  LPIs are delivered by the L1 kernel to
the L2 guest via the list registers in the same way as non-LPI
interrupts.

QEMU's code for handling writes to ICV_IARn (which happen when the L2
guest acknowledges an interrupt) and to ICV_EOIRn (which happen at
the end of the interrupt) did not consider LPIs, so it would
incorrectly treat interrupt IDs above 1023 as invalid.  Fix this by
using the correct condition, which is gicv3_intid_is_special().

Note that the condition in icv_dir_write() is correct -- LPIs
are not valid there and so we want to ignore both "special" ID
values and LPIs.

(In the pseudocode this logic is in:
 - VirtualReadIAR0(), VirtualReadIAR1(), which call IsSpecial()
 - VirtualWriteEOIR0(), VirtualWriteEOIR1(), which call
     VirtualIdentifierValid(data, TRUE) meaning "LPIs OK"
 - VirtualWriteDIR(), which calls VirtualIdentifierValid(data, FALSE)
     meaning "LPIs not OK")

This bug doesn't seem to have any visible effect on Linux L2 guests
most of the time, because the two bugs cancel each other out: we
neither mark the interrupt active nor deactivate it.  However it does
mean that the L2 vCPU priority while the LPI handler is running will
not be correct, so the interrupt handler could be unexpectedly
interrupted by a different interrupt.

(NB: this has nothing to do with using QEMU's emulated ITS.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
2021-11-29 10:10:21 +00:00
..
allwinner-a10-pic.c
apic_common.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
apic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
arm_gic_common.c
arm_gic_kvm.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
arm_gic.c hw/intc/arm_gic: Fix interrupt ID in GICD_SGIR register 2021-02-02 17:00:55 +00:00
arm_gicv2m.c
arm_gicv3_common.c hw/intc/arm_gicv3: Support multiple redistributor regions 2021-11-15 16:12:59 +00:00
arm_gicv3_cpuif.c hw/intc/arm_gicv3: fix handling of LPIs in list registers 2021-11-29 10:10:21 +00:00
arm_gicv3_dist.c hw/intc: GICv3 ITS Feature enablement 2021-09-13 21:01:08 +01:00
arm_gicv3_its_common.c hw/intc/arm_gicv3_its: Revert version increments in vmstate_its 2021-11-22 18:17:19 +00:00
arm_gicv3_its_kvm.c hw/intc: GICv3 ITS initial framework 2021-09-13 16:07:54 +01:00
arm_gicv3_its.c hw/intc: cannot clear GICv3 ITS CTLR[Enabled] bit 2021-11-26 16:54:09 +00:00
arm_gicv3_kvm.c hw/intc/arm_gicv3: Support multiple redistributor regions 2021-11-15 16:12:59 +00:00
arm_gicv3_redist.c hw/intc/arm_gicv3: Update cached state after LPI state changes 2021-11-26 16:57:51 +00:00
arm_gicv3.c hw/intc/arm_gicv3: Update cached state after LPI state changes 2021-11-26 16:57:51 +00:00
armv7m_nvic.c arm: Move system PPB container handling to armv7m 2021-09-01 11:08:18 +01:00
aspeed_vic.c
bcm2835_ic.c
bcm2836_control.c
etraxfs_pic.c hw: Replace anti-social QOM type names 2021-03-19 15:18:43 +01:00
exynos4210_combiner.c
exynos4210_gic.c
gic_internal.h
gicv3_internal.h hw/intc/arm_gicv3: Add new gicv3_intid_is_special() function 2021-11-26 16:58:57 +00:00
goldfish_pic.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
grlib_irqmp.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
heathrow_pic.c
i8259_common.c
i8259.c hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable 2021-03-19 08:48:18 -04:00
imx_avic.c
imx_gpcv2.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
intc.c
ioapic_common.c
ioapic.c Remove superfluous timer_del() calls 2021-01-08 15:13:38 +00:00
Kconfig hw/intc: Rename sifive_clint sources to riscv_aclint sources 2021-09-21 07:56:49 +10:00
loongson_liointc.c hw/intc/loongson_liointc: Fix per core ISR handling 2021-02-21 18:41:46 +01:00
m68k_irqc.c hw/m68k: Fix typo in SPDX tag 2021-11-09 10:11:27 +01:00
meson.build hw/intc: Remove the Ibex PLIC 2021-10-22 23:35:47 +10:00
mips_gic.c
omap_intc.c
ompic.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
openpic_kvm.c memory: Name all the memory listeners 2021-09-30 15:30:24 +02:00
openpic.c hw/intc: openpic: Clean up the styles 2021-09-30 12:26:06 +10:00
pl190.c
pnv_xive_regs.h
pnv_xive.c ppc/pnv: Add trace events for PCI event notification 2021-02-10 10:43:50 +11:00
ppc-uic.c misc: Correct relative include path 2021-06-05 21:10:42 +02:00
realview_gic.c
riscv_aclint.c hw/intc: Upgrade the SiFive CLINT implementation to RISC-V ACLINT 2021-09-21 07:56:49 +10:00
rx_icu.c
s390_flic_kvm.c target/s390x: move kvm files into kvm/ 2021-07-07 14:01:59 +02:00
s390_flic.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
sh_intc.c hw/intc/sh_intc: Remove unneeded local variable initialisers 2021-10-30 18:39:37 +02:00
sifive_plic.c hw/intc: sifive_plic: Cleanup the irq_request function 2021-10-22 23:35:47 +10:00
slavio_intctl.c
spapr_xive_kvm.c spapr/xive: Use xive_esb_rw() to trigger interrupts 2021-10-21 11:42:47 +11:00
spapr_xive.c spapr/xive: Add source status helpers 2021-10-21 11:42:47 +11:00
trace-events hw/sh4: Change debug printfs to traces 2021-10-30 18:39:37 +02:00
trace.h
vgic_common.h
xics_kvm.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xics_pnv.c
xics_spapr.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xics.c Do not include cpu.h if it's not really necessary 2021-05-02 17:24:51 +02:00
xilinx_intc.c
xive.c spapr/xive: Add source status helpers 2021-10-21 11:42:47 +11:00
xlnx-pmu-iomod-intc.c
xlnx-zynqmp-ipi.c