qemu-e2k/target
Peter Maydell 1a4d83b564 target-arm queue:
* hw/arm/virt: Disable pl011 clock migration if needed
  * target/arm: Make M-profile VTOR loads on reset handle memory aliasing
  * target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
 -----BEGIN PGP SIGNATURE-----
 
 iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmBZ+oEZHHBldGVyLm1h
 eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3jnoD/0aToosqYaDppJ7kxRIuOof
 9hXcQXIpMFBk0x4sAPhSnXSxnw4uevBJWl5zcn4GvqazdToq7ocn+38DVR0oxSg/
 VDZVTKOgE0yBMmsOCCrW5spZM4M/SQxa7ebfZU0uT9yu4W9XVT8Cs6EZ8wNuFUOo
 hs8zTf483wD9pW+dq195HGjvPpvk999DCeBFiYZHCncuwWyuQveduiKv6/V1NPQF
 KOlLoXto/lbcDdrOV0yPfhiLXMrXA0TIN3SDwE2QrPqTEQJWR0TaiUQ17HLCHgDG
 xNfh+nM5sP56B8a/aRwx9z+BKv0/+KjlYO4lZ165xRA+NGKpV8E7A7VjUZEbHM1R
 x+c/rCsk/dbDAVjJi9hb+RFsqpsdmz/6KhnaHBmO/beZXqeFjaD2JN+XpnrOsquk
 UUJJb0HS5f+hyBLU1jQsdeRX0Wl8N6xipd4pw0+K60I3Aefv+8/bqr6LYxJafqd4
 bhFvuDCecAE00FreexiWi32tHRV10aAWhxcpggh1n3dyflJkxjouRdeWZ7UAlMVK
 1yifIZqUsQ3Q+ZDUq9QZZJRbkldy7z0Kuw3xGMKZJnC40h+szs2Xl7ARZPu87fdZ
 4zdDOq3blfnLyLVoHO01bi+trA9XvNF/cn0CWw0eIRPo8NUr7rG6aROBHBMECq4v
 ZBljEj9Wrr1PgN/yxpxREQ==
 =eihR
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210323' into staging

target-arm queue:
 * hw/arm/virt: Disable pl011 clock migration if needed
 * target/arm: Make M-profile VTOR loads on reset handle memory aliasing
 * target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill

# gpg: Signature made Tue 23 Mar 2021 14:26:09 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210323:
  target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
  target/arm: Make M-profile VTOR loads on reset handle memory aliasing
  hw/core/loader: Add new function rom_ptr_for_as()
  memory: Add offset_in_region to flatview_cb arguments
  memory: Document flatview_for_each_range()
  memory: Make flatview_cb return bool, not int
  hw/arm/virt: Disable pl011 clock migration if needed

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2021-03-23 21:15:17 +00:00
..
alpha cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
arm target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill 2021-03-23 14:07:55 +00:00
avr target/avr: Fix interrupt execution 2021-03-15 00:39:52 +01:00
cris target/cris: Plug leakage of TCG temporaries 2021-02-22 09:04:58 +01:00
hexagon target/hexagon/gen_tcg_funcs: Fix a typo 2021-03-09 21:31:34 +01:00
hppa exec: Use cpu_untagged_addr in g2h; split out g2h_untagged 2021-02-16 11:04:53 +00:00
i386 i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_tsc_khz' is unset 2021-03-19 08:48:18 -04:00
lm32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
m68k Prepare MacOS ROM support: 2021-03-12 18:56:56 +00:00
microblaze cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
mips target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX 2021-03-22 15:05:41 +01:00
moxie exec: Move TranslationBlock typedef to qemu/typedefs.h 2021-02-18 08:19:08 +00:00
nios2 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
openrisc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
ppc ppc patch queue for 2021-03-10 2021-03-12 11:30:55 +00:00
riscv target/riscv: Prevent lost illegal instruction exceptions 2021-03-22 21:54:40 -04:00
rx cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
s390x target/s390x: Store r1/r2 for page-translation exceptions during MVPG 2021-03-15 11:03:20 +01:00
sh4 target/sh4: Remove unused definitions 2021-03-06 16:18:42 +01:00
sparc cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass 2021-02-05 10:24:15 -10:00
tricore target/tricore: Fix OPC2_32_RRPW_EXTR for width=0 2021-03-14 14:49:01 +01:00
unicore32 semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
xtensa semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
meson.build Remove deprecated target tilegx 2021-03-09 11:26:32 +01:00