j_mayer b4095fed95 Define Freescale cores specific MMU model, exceptions and input bus. ... (but do not provide any actual implementation). git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3680 c046a42c-6fe2-441c-8c8c-71466251a162		2007-11-17 22:42:36 +00:00
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cpu.h	Define Freescale cores specific MMU model, exceptions and input bus.	2007-11-17 22:42:36 +00:00
exec.h	Fix PowerPC targets compilation on 32 bits hosts:	2007-11-14 18:45:52 +00:00
helper_regs.h	PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.	2007-11-17 21:14:09 +00:00
helper.c	Define Freescale cores specific MMU model, exceptions and input bus.	2007-11-17 22:42:36 +00:00
mfrom_table_gen.c
mfrom_table.c
op_helper_mem.h	For consistency, align the address to the cache line before using it,	2007-10-26 00:55:17 +00:00
op_helper.c	PowerPC hypervisor mode is not fundamentally available only for PowerPC 64.	2007-11-17 21:14:09 +00:00
op_helper.h	Always make PowerPC hypervisor mode memory accesses and instructions	2007-11-16 14:11:28 +00:00
op_mem.h	Allow use of SPE extension by all PowerPC targets,	2007-11-12 01:56:18 +00:00
op_template.h	PowerPC SPE extension fix: must always preserve GPR high bits when	2007-11-12 23:29:14 +00:00
op.c	Always make PowerPC hypervisor mode memory accesses and instructions	2007-11-16 14:11:28 +00:00
STATUS	Update PowerPC emulation status file.	2007-10-25 21:38:16 +00:00
translate_init.c	Define Freescale cores specific MMU model, exceptions and input bus.	2007-11-17 22:42:36 +00:00
translate.c	A little more granularity in PowerPC instructions definition is needed	2007-11-17 22:26:51 +00:00