b4a8c9ae97
* implementation of first part of the A64 Neon instruction set * v8 AArch32 rounding and 16<->64 fp conversion instructions * fix MIDR value on Zynq boards * some minor bugfixes/code cleanups -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABCAAGBQJS67v6AAoJEDwlJe0UNgzeQfQP/26wGyhmrdBzbEa3OK2LRRHz 4zif7QXnIo9teo18ch0RaRthNAJX7NpfnhhCxrRWiw2RynvD/YrDwUKptxDZOzTx msVFL64ZdR+7xtTS0etYpMgUzF/MXwlq11I0dmod9eD1tETUaEcC8XJkGZDr6o16 2uTNjAfBjOBK0mDoYdKMJuz7d+qqhl8s/TRYTA50kWUERFfXxI03/axHtCkI7/fa aT8c2tkyVs8pqCmcs5BXU1Wn+8H15EeYIWIqGEB8sWTGsxfie95aIlqex2m1RtVI Rij231HimiQdVkTMVeI5Yxu400PeQ8igGbjDyLJB6UgzX/5otGKaKL1x2LI0ArxU oCjY3WV4OGnLYdSyMsSocemd/nBkeH2ntCDY3yl1XCqavR09UlgNgnffBAWq2qgA twmCXXGjj4B0KLECqAMtsLspVqSPaZDjrh6+lzMJB04xS0A7M0g+GPpioibg8XXR caGYbcRlCd8UwtLx8w1dnephiZtUTnits/C0bcHfmUwQ+JHGwLnCmRhuJnVze6mQ 62Of6A++P0+/1CofMxn+DqfZT6uwVM2gcexE2YLShnD3k147yWjivAoE8kpEDNSt kfOf6CcdAORw4Q3/1KLF59WYyvJQ5bwx9Tlg3BY+uQspBJooGL9klDV0J+DQc170 XoOYkaUPoHELWhW+nH9P =KIzb -----END PGP SIGNATURE----- Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140131' into staging target-arm queue: * implementation of first part of the A64 Neon instruction set * v8 AArch32 rounding and 16<->64 fp conversion instructions * fix MIDR value on Zynq boards * some minor bugfixes/code cleanups # gpg: Signature made Fri 31 Jan 2014 15:06:34 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * pmaydell/tags/pull-target-arm-20140131: (34 commits) arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes arm_gic: Introduce define for GIC_NR_SGIS target-arm: A64: Add SIMD shift by immediate target-arm: A64: Add simple SIMD 3-same floating point ops target-arm: A64: Add integer ops from SIMD 3-same group target-arm: A64: Add logic ops from SIMD 3 same group target-arm: A64: Add top level decode for SIMD 3-same group target-arm: A64: Add SIMD scalar 3 same add, sub and compare ops target-arm: A64: Add SIMD three-different ABDL instructions target-arm: A64: Add SIMD three-different multiply accumulate insns target-arm: Add AArch32 SIMD VCVTA, VCVTN, VCVTP and VCVTM target-arm: Add AArch32 FP VCVTA, VCVTN, VCVTP and VCVTM target-arm: Add AArch32 SIMD VRINTA, VRINTN, VRINTP, VRINTM, VRINTZ target-arm: Add set_neon_rmode helper target-arm: Add support for AArch32 SIMD VRINTX target-arm: Add support for AArch32 FP VRINTX target-arm: Add support for AArch32 FP VRINTZ target-arm: Add support for AArch32 FP VRINTR target-arm: Add AArch32 FP VRINTA, VRINTN, VRINTP and VRINTM target-arm: Move arm_rmode_to_sf to a shared location. ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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9pfs | ||
acpi | ||
alpha | ||
arm | ||
audio | ||
block | ||
bt | ||
char | ||
core | ||
cpu | ||
cris | ||
display | ||
dma | ||
gpio | ||
i2c | ||
i386 | ||
ide | ||
input | ||
intc | ||
isa | ||
lm32 | ||
m68k | ||
microblaze | ||
mips | ||
misc | ||
moxie | ||
net | ||
nvram | ||
openrisc | ||
pci | ||
pci-bridge | ||
pci-host | ||
pcmcia | ||
ppc | ||
s390x | ||
scsi | ||
sd | ||
sh4 | ||
sparc | ||
sparc64 | ||
ssi | ||
timer | ||
tpm | ||
unicore32 | ||
usb | ||
virtio | ||
watchdog | ||
xen | ||
xtensa | ||
Makefile.objs |