Aleksandar Markovic b621f0187e target/mips: MXU: Add handlers for logic instructions ... Add translation handlers for four logic MXU instructions. It should be noted that there is an error in MXU documentation (dated June 2017) regarding opcodes for this group of instructions. This was confirmed by running tests on hardware, and also by looking up other related public source trees (binutils, Android NDK). In initial MXU patches to QEMU, opcodes for MXU logic instructions were created to be in accordance with the MXU documentation, therefore the error from was propagated. This patch corrects that, changing the involved code. Besides that, as MXU was designed and implemented only for 32-bit CPUs, corresponding preprosessor conditions were added around MXU code, which allows more flexible implementation of MXU handlers. Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>		2019-01-03 17:52:52 +01:00
..
cp0_timer.c
cpu-qom.h
cpu.c	target/mips: Add disassembler support for nanoMIPS	2018-10-25 22:13:33 +02:00
cpu.h	target/mips: Introduce MXU registers	2018-10-29 14:13:47 +01:00
dsp_helper.c
gdbstub.c
helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-18 20:37:20 +02:00
helper.h	target/mips: Add CP0 PWCtl register	2018-10-18 20:37:20 +02:00
internal.h	target/mips: Implement hardware page table walker for MIPS32	2018-10-18 20:37:20 +02:00
kvm_mips.h
kvm.c
lmi_helper.c
machine.c	vmstate: constify VMStateField	2018-11-27 15:35:15 +01:00
Makefile.objs
mips-defs.h	target/mips: Define a bit for MXU in insn_flags	2018-10-29 14:13:47 +01:00
mips-semi.c
msa_helper.c
op_helper.c	target/mips: Implement hardware page table walker for MIPS32	2018-10-18 20:37:20 +02:00
TODO
trace-events
translate_init.inc.c	target/mips: Disable R5900 support	2018-11-17 19:29:34 +01:00
translate.c	target/mips: MXU: Add handlers for logic instructions	2019-01-03 17:52:52 +01:00