qemu-e2k/include/hw/pci-host
Daniel Henrique Barboza b7c1750dc4 ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties
The same rationale provided in the PHB3 bus case applies here.

Note: we could have merged both buses in a single object, like we did
with the root ports, and spare some boilerplate. The reason we opted to
preserve both buses objects is twofold:

- there's not user side advantage in doing so. Unifying the root ports
presents a clear user QOL change when we enable user created devices back.
The buses objects, aside from having a different QOM name, is transparent
to the user;

- we leave a door opened in case we want to increase the root port limit
for phb4/5 later on without having to deal with phb3 code.

Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Message-Id: <20220811163950.578927-3-danielhb413@gmail.com>
2022-08-31 14:08:05 -03:00
..
designware.h
dino.h dino: move from hw/hppa to hw/pci-host 2022-05-08 18:52:36 +01:00
gpex.h
i440fx.h i386/pc: create pci-host qdev prior to pc_memory_init() 2022-07-26 10:40:58 -04:00
ls7a.h hw/loongarch: Change macro name 'LS7A_XXX' to 'VIRT_XXX' 2022-07-29 15:07:55 -07:00
mv64361.h
pam.h
pnv_phb3_regs.h ppc: Define SETFIELD for the ppc target 2022-07-06 10:22:38 -03:00
pnv_phb3.h ppc/pnv: add phb-id/chip-id PnvPHB3RootBus properties 2022-08-31 14:08:05 -03:00
pnv_phb4_regs.h ppc/pnv: Add support for PHB5 "Address-based trigger" mode 2022-03-02 06:51:39 +01:00
pnv_phb4.h ppc/pnv: add phb-id/chip-id PnvPHB4RootBus properties 2022-08-31 14:08:05 -03:00
ppce500.h
q35.h
remote.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
sabre.h
spapr.h
uninorth.h
xilinx-pcie.h