Max Filippov eb3f4298c9 target/xtensa: implement PREFCTL SR ... Cache prefetch option adds an unprivileged SR PREFCTL. Add trivial implementation for this SR. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>		2019-02-28 04:43:22 -08:00
..
core-dc232b
core-dc233c
core-de212
core-fsf
core-sample_controller
core-test_kc705_be
core-test_mmuhifi_c3	target/xtensa: fixup test_mmuhifi_c3 overlay	2019-02-18 21:29:08 -08:00
core-dc232b.c
core-dc233c.c
core-de212.c
core-fsf.c
core-sample_controller.c
core-test_kc705_be.c
core-test_mmuhifi_c3.c	target/xtensa: add test_mmuhifi_c3 core	2019-01-28 11:55:20 -08:00
cpu-qom.h
cpu.c
cpu.h	target/xtensa: implement PREFCTL SR	2019-02-28 04:43:22 -08:00
dbg_helper.c	target/xtensa: extract debug helpers	2019-01-13 23:35:34 -08:00
exc_helper.c	target/xtensa: fix access to the INTERRUPT SR	2019-01-24 10:44:26 -08:00
fpu_helper.c	target/xtensa: extract FPU helpers	2019-01-13 23:33:42 -08:00
gdbstub.c
helper.c	target/xtensa: reorganize register handling in translators	2019-02-28 04:43:22 -08:00
helper.h	target/xtensa: only rotate window in the retw helper	2019-02-28 04:43:22 -08:00
import_core.sh	target/xtensa/import_core.sh: don't add duplicate 'static'	2019-02-08 19:37:45 -08:00
Makefile.objs	target/xtensa: add test_mmuhifi_c3 core	2019-01-28 11:55:20 -08:00
mmu_helper.c	target/xtensa: extract MMU helpers	2019-01-13 23:34:57 -08:00
monitor.c
op_helper.c	target/xtensa: fix access to the INTERRUPT SR	2019-01-24 10:44:26 -08:00
overlay_tool.h	target/xtensa: move xtensa_finalize_config to xtensa_core_class_init	2019-02-18 21:29:08 -08:00
translate.c	target/xtensa: implement PREFCTL SR	2019-02-28 04:43:22 -08:00
win_helper.c	target/xtensa: only rotate window in the retw helper	2019-02-28 04:43:22 -08:00
xtensa-isa-internal.h
xtensa-isa.c
xtensa-isa.h
xtensa-semi.c