Maksim Davydov fb00aa6126 target/i386: EPYC-Rome model without XSAVES ... Based on the kernel commit "b0563468ee x86/CPU/AMD: Disable XSAVES on AMD family 0x17", host system with EPYC-Rome can clear XSAVES capability bit. In another words, EPYC-Rome host without XSAVES can occur. Thus, we need an EPYC-Rome cpu model (without this feature) that matches the solution of fixing this erratum Signed-off-by: Maksim Davydov <davydov-max@yandex-team.ru> Message-Id: <20230524213748.8918-1-davydov-max@yandex-team.ru> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2023-05-25 09:30:52 +02:00
..
hax
hvf
kvm	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
nvmm
tcg	target/i386: Fix exception classes for MOVNTPS/MOVNTPD.	2023-05-18 08:53:50 +02:00
whpx	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
arch_dump.c
arch_memory_mapping.c
cpu-dump.c
cpu-internal.h
cpu-param.h
cpu-qom.h
cpu-sysemu.c
cpu.c	target/i386: EPYC-Rome model without XSAVES	2023-05-25 09:30:52 +02:00
cpu.h	target/i386: add support for FB_CLEAR feature	2023-05-18 08:53:50 +02:00
gdbstub.c
helper.c
helper.h
host-cpu.c	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
host-cpu.h
Kconfig
machine.c
meson.build
monitor.c
ops_sse_header.h
ops_sse.h	target/i386: fix avx2 instructions vzeroall and vpermdq	2023-05-18 08:53:50 +02:00
sev-sysemu-stub.c
sev.c	i386/sev: Update checks and information related to reduced-phys-bits	2023-04-28 12:50:34 +02:00
sev.h
shift_helper_template.h
svm.h
trace-events
trace.h
xsave_helper.c