qemu-e2k/include/hw/i386
Joao Martins b3e6982b41 i386/pc: restrict AMD only enforcing of 1Tb hole to new machine type
The added enforcing is only relevant in the case of AMD where the
range right before the 1TB is restricted and cannot be DMA mapped
by the kernel consequently leading to IOMMU INVALID_DEVICE_REQUEST
or possibly other kinds of IOMMU events in the AMD IOMMU.

Although, there's a case where it may make sense to disable the
IOVA relocation/validation when migrating from a
non-amd-1tb-aware qemu to one that supports it.

Relocating RAM regions to after the 1Tb hole has consequences for
guest ABI because we are changing the memory mapping, so make
sure that only new machine enforce but not older ones.

Signed-off-by: Joao Martins <joao.m.martins@oracle.com>
Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20220719170014.27028-12-joao.m.martins@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-07-26 10:40:58 -04:00
..
apic_internal.h
apic-msidef.h
apic.h
hostmem-epc.h hostmem: Add hostmem-epc as a backend for SGX EPC 2021-09-30 14:50:19 +02:00
ich9.h
intel_iommu.h intel_iommu: Support IR-only mode without DMA translation 2022-05-16 04:38:39 -04:00
ioapic_internal.h intc: Unexport InterruptStatsProviderClass-related functions 2022-01-27 12:08:50 +01:00
ioapic.h
microvm.h hw/i386: Make pic a property of common x86 base machine type 2022-05-16 16:15:40 -04:00
pc.h i386/pc: restrict AMD only enforcing of 1Tb hole to new machine type 2022-07-26 10:40:58 -04:00
sgx-epc.h numa: Enable numa for SGX EPC sections 2021-12-10 09:47:18 +01:00
topology.h
vmport.h
x86-iommu.h Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
x86.h hw/i386: add 4g boundary start to X86MachineState 2022-07-26 10:40:58 -04:00