cb135f59b8
This patch translates all IOAPIC interrupts into MSI ones. One pseudo ioapic address space is added to transfer the MSI message. By default, it will be system memory address space. When IR is enabled, it will be IOMMU address space. Currently, only emulated IOAPIC is supported. Idea suggested by Jan Kiszka and Rita Sinha in the following patch: https://lists.gnu.org/archive/html/qemu-devel/2016-03/msg01933.html Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> |
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.. | ||
kvm | ||
xen | ||
acpi-build.c | ||
acpi-build.h | ||
intel_iommu_internal.h | ||
intel_iommu.c | ||
kvmvapic.c | ||
Makefile.objs | ||
multiboot.c | ||
multiboot.h | ||
pc_piix.c | ||
pc_q35.c | ||
pc_sysfw.c | ||
pc.c | ||
pci-assign-load-rom.c | ||
trace-events | ||
x86-iommu.c |