b854bc196f
Fix DMA register writes if target_phys_addr_t is 64-bit. Make more functions static. A timer hack to make PalmOS run in finite time (uses very short timer periods, much shorter than clocksource tick). Re-calculate internal clock rates on start-up. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3527 c046a42c-6fe2-441c-8c8c-71466251a162
750 lines
18 KiB
C
750 lines
18 KiB
C
/*
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* OMAP clocks.
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*
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* Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
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*
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* Clocks data comes in part from arch/arm/mach-omap1/clock.h in Linux.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "vl.h"
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struct clk {
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const char *name;
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const char *alias;
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struct clk *parent;
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struct clk *child1;
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struct clk *sibling;
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#define ALWAYS_ENABLED (1 << 0)
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#define CLOCK_IN_OMAP310 (1 << 10)
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#define CLOCK_IN_OMAP730 (1 << 11)
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#define CLOCK_IN_OMAP1510 (1 << 12)
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#define CLOCK_IN_OMAP16XX (1 << 13)
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uint32_t flags;
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int id;
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int running; /* Is currently ticking */
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int enabled; /* Is enabled, regardless of its input clk */
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unsigned long rate; /* Current rate (if .running) */
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unsigned int divisor; /* Rate relative to input (if .enabled) */
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unsigned int multiplier; /* Rate relative to input (if .enabled) */
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qemu_irq users[16]; /* Who to notify on change */
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int usecount; /* Automatically idle when unused */
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};
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static struct clk xtal_osc12m = {
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.name = "xtal_osc_12m",
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk xtal_osc32k = {
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.name = "xtal_osc_32k",
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.rate = 32768,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_ref = {
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.name = "ck_ref",
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.alias = "clkin",
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.parent = &xtal_osc12m,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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/* If a dpll is disabled it becomes a bypass, child clocks don't stop */
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static struct clk dpll1 = {
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.name = "dpll1",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk dpll2 = {
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.name = "dpll2",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk dpll3 = {
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.name = "dpll3",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk dpll4 = {
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.name = "dpll4",
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.parent = &ck_ref,
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.multiplier = 4,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk apll = {
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.name = "apll",
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.parent = &ck_ref,
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.multiplier = 48,
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.divisor = 12,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_48m = {
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.name = "ck_48m",
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.parent = &dpll4, /* either dpll4 or apll */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk ck_dpll1out = {
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.name = "ck_dpll1out",
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.parent = &dpll1,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk sossi_ck = {
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.name = "ck_sossi",
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.parent = &ck_dpll1out,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk clkm1 = {
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.name = "clkm1",
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.alias = "ck_gen1",
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.parent = &dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk clkm2 = {
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.name = "clkm2",
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.alias = "ck_gen2",
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.parent = &dpll1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk clkm3 = {
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.name = "clkm3",
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.alias = "ck_gen3",
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.parent = &dpll1, /* either dpll1 or ck_ref */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk arm_ck = {
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.name = "arm_ck",
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.alias = "mpu_ck",
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.parent = &clkm1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk armper_ck = {
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.name = "armper_ck",
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.alias = "mpuper_ck",
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.parent = &clkm1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk arm_gpio_ck = {
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.name = "arm_gpio_ck",
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.alias = "mpu_gpio_ck",
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.parent = &clkm1,
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.divisor = 1,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk armxor_ck = {
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.name = "armxor_ck",
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.alias = "mpuxor_ck",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk armtim_ck = {
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.name = "armtim_ck",
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.alias = "mputim_ck",
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.parent = &ck_ref, /* either CLKIN or DPLL1 */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk armwdt_ck = {
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.name = "armwdt_ck",
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.alias = "mpuwd_ck",
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.parent = &clkm1,
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.divisor = 14,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk arminth_ck16xx = {
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.name = "arminth_ck",
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.parent = &arm_ck,
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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/* Note: On 16xx the frequency can be divided by 2 by programming
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* ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
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*
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* 1510 version is in TC clocks.
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*/
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};
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static struct clk dsp_ck = {
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.name = "dsp_ck",
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.parent = &clkm2,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dspmmu_ck = {
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.name = "dspmmu_ck",
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.parent = &clkm2,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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ALWAYS_ENABLED,
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};
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static struct clk dspper_ck = {
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.name = "dspper_ck",
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.parent = &clkm2,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dspxor_ck = {
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.name = "dspxor_ck",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk dsptim_ck = {
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.name = "dsptim_ck",
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.parent = &ck_ref,
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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static struct clk tc_ck = {
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.name = "tc_ck",
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.parent = &clkm3,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
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CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk arminth_ck15xx = {
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.name = "arminth_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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/* Note: On 1510 the frequency follows TC_CK
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*
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* 16xx version is in MPU clocks.
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*/
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};
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static struct clk tipb_ck = {
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/* No-idle controlled by "tc_ck" */
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.name = "tipb_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk l3_ocpi_ck = {
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/* No-idle controlled by "tc_ck" */
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.name = "l3_ocpi_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk tc1_ck = {
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.name = "tc1_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk tc2_ck = {
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.name = "tc2_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk dma_ck = {
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/* No-idle controlled by "tc_ck" */
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.name = "dma_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk dma_lcdfree_ck = {
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.name = "dma_lcdfree_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk api_ck = {
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.name = "api_ck",
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.alias = "mpui_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk lb_ck = {
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.name = "lb_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk lbfree_ck = {
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.name = "lbfree_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk rhea1_ck = {
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.name = "rhea1_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk rhea2_ck = {
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.name = "rhea2_ck",
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.parent = &tc_ck,
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.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
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};
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static struct clk lcd_ck_16xx = {
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.name = "lcd_ck",
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.parent = &clkm3,
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.flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
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};
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static struct clk lcd_ck_1510 = {
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.name = "lcd_ck",
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.parent = &clkm3,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk uart1_1510 = {
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.name = "uart1_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk uart1_16xx = {
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.name = "uart1_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck,
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk uart2_ck = {
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.name = "uart2_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
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ALWAYS_ENABLED,
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};
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static struct clk uart3_1510 = {
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.name = "uart3_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck,/* either armper_ck or dpll4 */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
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};
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static struct clk uart3_16xx = {
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.name = "uart3_ck",
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/* Direct from ULPD, no real parent */
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.parent = &armper_ck,
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */
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.name = "usb_clk0",
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.alias = "usb.clko",
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/* Direct from ULPD, no parent */
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.rate = 6000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk usb_hhc_ck1510 = {
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.name = "usb_hhc_ck",
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/* Direct from ULPD, no parent */
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.rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
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};
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static struct clk usb_hhc_ck16xx = {
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.name = "usb_hhc_ck",
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/* Direct from ULPD, no parent */
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.rate = 48000000,
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/* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk usb_dc_ck = {
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.name = "usb_dc_ck",
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/* Direct from ULPD, no parent */
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk mclk_1510 = {
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.name = "mclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510,
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};
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static struct clk bclk_310 = {
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.name = "bt_mclk_out", /* Alias midi_mclk_out? */
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.parent = &armper_ck,
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.flags = CLOCK_IN_OMAP310,
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};
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static struct clk mclk_310 = {
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.name = "com_mclk_out",
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.parent = &armper_ck,
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.flags = CLOCK_IN_OMAP310,
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};
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static struct clk mclk_16xx = {
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.name = "mclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk bclk_1510 = {
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.name = "bclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.rate = 12000000,
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.flags = CLOCK_IN_OMAP1510,
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};
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static struct clk bclk_16xx = {
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.name = "bclk",
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/* Direct from ULPD, no parent. May be enabled by ext hardware. */
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk mmc1_ck = {
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.name = "mmc_ck",
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.id = 1,
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/* Functional clock is direct from ULPD, interface clock is ARMPER */
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.parent = &armper_ck, /* either armper_ck or dpll4 */
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
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};
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static struct clk mmc2_ck = {
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.name = "mmc_ck",
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.id = 2,
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/* Functional clock is direct from ULPD, interface clock is ARMPER */
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.parent = &armper_ck,
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.rate = 48000000,
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.flags = CLOCK_IN_OMAP16XX,
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};
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static struct clk cam_mclk = {
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.name = "cam.mclk",
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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.rate = 12000000,
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};
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static struct clk cam_exclk = {
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.name = "cam.exclk",
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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/* Either 12M from cam.mclk or 48M from dpll4 */
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.parent = &cam_mclk,
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};
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static struct clk cam_lclk = {
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.name = "cam.lclk",
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.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
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};
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|
static struct clk i2c_fck = {
|
|
.name = "i2c_fck",
|
|
.id = 1,
|
|
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
|
ALWAYS_ENABLED,
|
|
.parent = &armxor_ck,
|
|
};
|
|
|
|
static struct clk i2c_ick = {
|
|
.name = "i2c_ick",
|
|
.id = 1,
|
|
.flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
|
|
.parent = &armper_ck,
|
|
};
|
|
|
|
static struct clk clk32k = {
|
|
.name = "clk32-kHz",
|
|
.flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
|
|
ALWAYS_ENABLED,
|
|
.parent = &xtal_osc32k,
|
|
};
|
|
|
|
static struct clk *onchip_clks[] = {
|
|
/* non-ULPD clocks */
|
|
&xtal_osc12m,
|
|
&xtal_osc32k,
|
|
&ck_ref,
|
|
&dpll1,
|
|
&dpll2,
|
|
&dpll3,
|
|
&dpll4,
|
|
&apll,
|
|
&ck_48m,
|
|
/* CK_GEN1 clocks */
|
|
&clkm1,
|
|
&ck_dpll1out,
|
|
&sossi_ck,
|
|
&arm_ck,
|
|
&armper_ck,
|
|
&arm_gpio_ck,
|
|
&armxor_ck,
|
|
&armtim_ck,
|
|
&armwdt_ck,
|
|
&arminth_ck15xx, &arminth_ck16xx,
|
|
/* CK_GEN2 clocks */
|
|
&clkm2,
|
|
&dsp_ck,
|
|
&dspmmu_ck,
|
|
&dspper_ck,
|
|
&dspxor_ck,
|
|
&dsptim_ck,
|
|
/* CK_GEN3 clocks */
|
|
&clkm3,
|
|
&tc_ck,
|
|
&tipb_ck,
|
|
&l3_ocpi_ck,
|
|
&tc1_ck,
|
|
&tc2_ck,
|
|
&dma_ck,
|
|
&dma_lcdfree_ck,
|
|
&api_ck,
|
|
&lb_ck,
|
|
&lbfree_ck,
|
|
&rhea1_ck,
|
|
&rhea2_ck,
|
|
&lcd_ck_16xx,
|
|
&lcd_ck_1510,
|
|
/* ULPD clocks */
|
|
&uart1_1510,
|
|
&uart1_16xx,
|
|
&uart2_ck,
|
|
&uart3_1510,
|
|
&uart3_16xx,
|
|
&usb_clk0,
|
|
&usb_hhc_ck1510, &usb_hhc_ck16xx,
|
|
&usb_dc_ck,
|
|
&mclk_1510, &mclk_16xx, &mclk_310,
|
|
&bclk_1510, &bclk_16xx, &bclk_310,
|
|
&mmc1_ck,
|
|
&mmc2_ck,
|
|
&cam_mclk,
|
|
&cam_exclk,
|
|
&cam_lclk,
|
|
&clk32k,
|
|
/* Virtual clocks */
|
|
&i2c_fck,
|
|
&i2c_ick,
|
|
0
|
|
};
|
|
|
|
void omap_clk_adduser(struct clk *clk, qemu_irq user)
|
|
{
|
|
qemu_irq *i;
|
|
|
|
for (i = clk->users; *i; i ++);
|
|
*i = user;
|
|
}
|
|
|
|
/* If a clock is allowed to idle, it is disabled automatically when
|
|
* all of clock domains using it are disabled. */
|
|
int omap_clk_is_idle(struct clk *clk)
|
|
{
|
|
struct clk *chld;
|
|
|
|
if (!clk->enabled && (!clk->usecount || !(clk->flags && ALWAYS_ENABLED)))
|
|
return 1;
|
|
if (clk->usecount)
|
|
return 0;
|
|
|
|
for (chld = clk->child1; chld; chld = chld->sibling)
|
|
if (!omap_clk_is_idle(chld))
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name)
|
|
{
|
|
struct clk *i;
|
|
|
|
for (i = mpu->clks; i->name; i ++)
|
|
if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))
|
|
return i;
|
|
cpu_abort(mpu->env, "%s: %s not found\n", __FUNCTION__, name);
|
|
}
|
|
|
|
void omap_clk_get(struct clk *clk)
|
|
{
|
|
clk->usecount ++;
|
|
}
|
|
|
|
void omap_clk_put(struct clk *clk)
|
|
{
|
|
if (!(clk->usecount --))
|
|
cpu_abort(cpu_single_env, "%s: %s is not in use\n",
|
|
__FUNCTION__, clk->name);
|
|
}
|
|
|
|
static void omap_clk_update(struct clk *clk)
|
|
{
|
|
int parent, running;
|
|
qemu_irq *user;
|
|
struct clk *i;
|
|
|
|
if (clk->parent)
|
|
parent = clk->parent->running;
|
|
else
|
|
parent = 1;
|
|
|
|
running = parent && (clk->enabled ||
|
|
((clk->flags & ALWAYS_ENABLED) && clk->usecount));
|
|
if (clk->running != running) {
|
|
clk->running = running;
|
|
for (user = clk->users; *user; user ++)
|
|
qemu_set_irq(*user, running);
|
|
for (i = clk->child1; i; i = i->sibling)
|
|
omap_clk_update(i);
|
|
}
|
|
}
|
|
|
|
static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,
|
|
unsigned long int div, unsigned long int mult)
|
|
{
|
|
struct clk *i;
|
|
qemu_irq *user;
|
|
|
|
clk->rate = muldiv64(rate, mult, div);
|
|
if (clk->running)
|
|
for (user = clk->users; *user; user ++)
|
|
qemu_irq_raise(*user);
|
|
for (i = clk->child1; i; i = i->sibling)
|
|
omap_clk_rate_update_full(i, rate,
|
|
div * i->divisor, mult * i->multiplier);
|
|
}
|
|
|
|
static void omap_clk_rate_update(struct clk *clk)
|
|
{
|
|
struct clk *i;
|
|
unsigned long int div, mult = div = 1;
|
|
|
|
for (i = clk; i->parent; i = i->parent) {
|
|
div *= i->divisor;
|
|
mult *= i->multiplier;
|
|
}
|
|
|
|
omap_clk_rate_update_full(clk, i->rate, div, mult);
|
|
}
|
|
|
|
void omap_clk_reparent(struct clk *clk, struct clk *parent)
|
|
{
|
|
struct clk **p;
|
|
|
|
if (clk->parent) {
|
|
for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);
|
|
*p = clk->sibling;
|
|
}
|
|
|
|
clk->parent = parent;
|
|
if (parent) {
|
|
clk->sibling = parent->child1;
|
|
parent->child1 = clk;
|
|
omap_clk_update(clk);
|
|
omap_clk_rate_update(clk);
|
|
} else
|
|
clk->sibling = 0;
|
|
}
|
|
|
|
void omap_clk_onoff(struct clk *clk, int on)
|
|
{
|
|
clk->enabled = on;
|
|
omap_clk_update(clk);
|
|
}
|
|
|
|
void omap_clk_canidle(struct clk *clk, int can)
|
|
{
|
|
if (can)
|
|
omap_clk_put(clk);
|
|
else
|
|
omap_clk_get(clk);
|
|
}
|
|
|
|
void omap_clk_setrate(struct clk *clk, int divide, int multiply)
|
|
{
|
|
clk->divisor = divide;
|
|
clk->multiplier = multiply;
|
|
omap_clk_rate_update(clk);
|
|
}
|
|
|
|
int64_t omap_clk_getrate(omap_clk clk)
|
|
{
|
|
return clk->rate;
|
|
}
|
|
|
|
void omap_clk_init(struct omap_mpu_state_s *mpu)
|
|
{
|
|
struct clk **i, *j, *k;
|
|
int count;
|
|
int flag;
|
|
|
|
if (cpu_is_omap310(mpu))
|
|
flag = CLOCK_IN_OMAP310;
|
|
else if (cpu_is_omap1510(mpu))
|
|
flag = CLOCK_IN_OMAP1510;
|
|
else
|
|
return;
|
|
|
|
for (i = onchip_clks, count = 0; *i; i ++)
|
|
if ((*i)->flags & flag)
|
|
count ++;
|
|
mpu->clks = (struct clk *) qemu_mallocz(sizeof(struct clk) * (count + 1));
|
|
for (i = onchip_clks, j = mpu->clks; *i; i ++)
|
|
if ((*i)->flags & flag) {
|
|
memcpy(j, *i, sizeof(struct clk));
|
|
for (k = mpu->clks; k < j; k ++)
|
|
if (j->parent && !strcmp(j->parent->name, k->name)) {
|
|
j->parent = k;
|
|
j->sibling = k->child1;
|
|
k->child1 = j;
|
|
} else if (k->parent && !strcmp(k->parent->name, j->name)) {
|
|
k->parent = j;
|
|
k->sibling = j->child1;
|
|
j->child1 = k;
|
|
}
|
|
j->divisor = j->divisor ?: 1;
|
|
j->multiplier = j->multiplier ?: 1;
|
|
j ++;
|
|
}
|
|
for (j = mpu->clks; count --; j ++) {
|
|
omap_clk_update(j);
|
|
omap_clk_rate_update(j);
|
|
}
|
|
}
|