Jiaxi Chen d1a1111514 target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration ... Latest Intel platform Granite Rapids has introduced a new instruction - PREFETCHIT0/1, which moves code to memory (cache) closer to the processor depending on specific hints. The bit definition: CPUID.(EAX=7,ECX=1):EDX[bit 14] Add CPUID definition for PREFETCHIT0/1. Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com> Signed-off-by: Tao Su <tao1.su@linux.intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20230303065913.1246327-7-tao1.su@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>		2023-04-28 12:50:34 +02:00
..
hax
hvf
kvm
nvmm
tcg	tcg: Replace tcg_abort with g_assert_not_reached	2023-04-23 08:17:46 +01:00
whpx
arch_dump.c
arch_memory_mapping.c
cpu-dump.c
cpu-internal.h
cpu-param.h
cpu-qom.h
cpu-sysemu.c
cpu.c	target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration	2023-04-28 12:50:34 +02:00
cpu.h	target/i386: Add support for PREFETCHIT0/1 in CPUID enumeration	2023-04-28 12:50:34 +02:00
gdbstub.c
helper.c
helper.h
host-cpu.c
host-cpu.h
Kconfig
machine.c
meson.build
monitor.c
ops_sse_header.h
ops_sse.h
sev-sysemu-stub.c
sev.c	i386/sev: Update checks and information related to reduced-phys-bits	2023-04-28 12:50:34 +02:00
sev.h
shift_helper_template.h
svm.h
trace-events
trace.h
xsave_helper.c