2f493fee18
This brings us a step closer to QOM'ified SH7750 SoC and
fixes b350ab75 (target-sh4: Move PVR/PRR/CVR into SuperHCPUClass)
assuming SuperHCPU type for SUPERH_CPU_GET_CLASS().
Fix Coding Style issues while at it (indentation, braces).
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
58 lines
1.6 KiB
C
58 lines
1.6 KiB
C
#ifndef QEMU_SH_H
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#define QEMU_SH_H
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/* Definitions for SH board emulation. */
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#include "hw/sh4/sh_intc.h"
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#define A7ADDR(x) ((x) & 0x1fffffff)
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#define P4ADDR(x) ((x) | 0xe0000000)
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/* sh7750.c */
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struct SH7750State;
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struct MemoryRegion;
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struct SH7750State *sh7750_init(SuperHCPU *cpu, struct MemoryRegion *sysmem);
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typedef struct {
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/* The callback will be triggered if any of the designated lines change */
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uint16_t portamask_trigger;
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uint16_t portbmask_trigger;
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/* Return 0 if no action was taken */
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int (*port_change_cb) (uint16_t porta, uint16_t portb,
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uint16_t * periph_pdtra,
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uint16_t * periph_portdira,
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uint16_t * periph_pdtrb,
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uint16_t * periph_portdirb);
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} sh7750_io_device;
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int sh7750_register_io_device(struct SH7750State *s,
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sh7750_io_device * device);
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/* sh_timer.c */
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#define TMU012_FEAT_TOCR (1 << 0)
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#define TMU012_FEAT_3CHAN (1 << 1)
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#define TMU012_FEAT_EXTCLK (1 << 2)
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void tmu012_init(struct MemoryRegion *sysmem, hwaddr base,
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int feat, uint32_t freq,
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qemu_irq ch0_irq, qemu_irq ch1_irq,
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qemu_irq ch2_irq0, qemu_irq ch2_irq1);
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/* sh_serial.c */
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#define SH_SERIAL_FEAT_SCIF (1 << 0)
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void sh_serial_init(MemoryRegion *sysmem,
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hwaddr base, int feat,
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uint32_t freq, CharDriverState *chr,
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qemu_irq eri_source,
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qemu_irq rxi_source,
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qemu_irq txi_source,
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qemu_irq tei_source,
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qemu_irq bri_source);
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/* sh7750.c */
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qemu_irq sh7750_irl(struct SH7750State *s);
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/* tc58128.c */
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int tc58128_init(struct SH7750State *s, const char *zone1, const char *zone2);
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#endif
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