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d922445020
qemu-e2k/target-mips
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Maciej W. Rozycki d922445020 target-mips: Tighten ISA level checks 
Tighten ISA level checks down to MIPS II that many of our instructions
are missing.  Also make sure any 64-bit instruction enables are only
applied to 64-bit processors, that is ones that implement at least the
MIPS III ISA.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2014-12-16 12:45:20 +00:00
..
cpu-qom.h target-mips: Use cpu_exec_interrupt qom hook 2014-09-25 18:54:22 +01:00
cpu.c gdbstub: Allow target CPUs to specify watchpoint STOP_BEFORE_ACCESS flag 2014-10-06 14:25:43 +01:00
cpu.h target-mips: Tighten ISA level checks 2014-12-16 12:45:20 +00:00
dsp_helper.c target-mips/dsp_helper.c: Add ifdef guards around various functions 2014-10-14 13:29:14 +01:00
gdbstub.c target-mips: Correct the writes to Status and Cause registers via gdbstub 2014-12-16 12:45:19 +00:00
helper.c target-mips: Tighten ISA level checks 2014-12-16 12:45:20 +00:00
helper.h target-mips: Fix CP0.Config3.ISAOnExc write accesses 2014-12-16 12:45:20 +00:00
kvm_mips.h target-mips: kvm: Add main KVM support for MIPS 2014-06-18 16:58:52 +02:00
kvm.c target-mips: kvm: do not use get_clock() 2014-12-15 12:21:01 +01:00
lmi_helper.c
machine.c target-mips: update cpu_save/cpu_load to support new registers 2014-11-03 11:48:34 +00:00
Makefile.objs target-mips: add msa_helper.c 2014-11-03 11:48:35 +00:00
mips-defs.h target-mips: add MSA defines and data structure 2014-11-03 11:48:35 +00:00
msa_helper.c target-mips: add MSA 2RF format instructions 2014-11-03 11:48:35 +00:00
op_helper.c target-mips: Fix CP0.Config3.ISAOnExc write accesses 2014-12-16 12:45:20 +00:00
TODO
translate_init.c target-mips: Fix formatting in `mips_defs' 2014-12-16 12:45:19 +00:00
translate.c target-mips: Tighten ISA level checks 2014-12-16 12:45:20 +00:00