qemu-e2k

History

Richard Henderson 1ee73216f4 log: Add locking to large logging blocks Reuse the existing locking provided by stdio to keep in_asm, cpu, op, op_opt, op_ind, and out_asm as contiguous blocks. While it isn't possible to interleave e.g. in_asm or op_opt logs because of the TB lock protecting all code generation, it is possible to interleave cpu logs, or to interleave a cpu dump with an out_asm dump. For mingw32, we appear to have no viable solution for this. The locking functions are not properly exported from the system runtime library. Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Richard Henderson <rth@twiddle.net>		2016-11-01 10:29:03 -06:00
..
cpu-qom.h	target-lm32: make cpu-qom.h not target specific	2016-05-19 13:08:04 +02:00
cpu.c	exec: move cpu_exec_init() calls to realize functions	2016-10-24 17:29:16 -02:00
cpu.h	target-*: Clean up cpu.h header guards	2016-07-12 16:19:16 +02:00
gdbstub.c	qemu-common: push cpu.h inclusion out of qemu-common.h	2016-05-19 16:42:29 +02:00
helper.c	cpu-exec: Rename cpu_resume_from_signal() to cpu_loop_exit_noexc()	2016-06-09 15:55:02 +01:00
helper.h
lm32-semi.c	lm32: Clean up includes	2016-01-29 15:07:22 +00:00
machine.c	qemu-common: push cpu.h inclusion out of qemu-common.h	2016-05-19 16:42:29 +02:00
Makefile.objs
op_helper.c	Fix confusing argument names in some common functions	2016-07-12 13:06:08 +01:00
README
TODO
translate.c	log: Add locking to large logging blocks	2016-11-01 10:29:03 -06:00

README

LatticeMico32 target
--------------------

General
-------
All opcodes including the JUART CSRs are supported.


JTAG UART
---------
JTAG UART is routed to a serial console device. For the current boards it
is the second one. Ie to enable it in the qemu virtual console window use
the following command line parameters:
  -serial vc -serial vc
This will make serial0 (the lm32_uart) and serial1 (the JTAG UART)
available as virtual consoles.


Semihosting
-----------
Semihosting on this target is supported. Some system calls like read, write
and exit are executed on the host if semihosting is enabled. See
target/lm32-semi.c for all supported system calls. Emulation aware programs
can use this mechanism to shut down the virtual machine and print to the
host console. See the tcg tests for an example.


Special instructions
--------------------
The translation recognizes one special instruction to halt the cpu:
  and r0, r0, r0
On real hardware this instruction is a nop. It is not used by GCC and
should (hopefully) not be used within hand-crafted assembly.
Insert this instruction in your idle loop to reduce the cpu load on the
host.


Ignoring the MSB of the address bus
-----------------------------------
Some SoC ignores the MSB on the address bus. Thus creating a shadow memory
area. As a general rule, 0x00000000-0x7fffffff is cached, whereas
0x80000000-0xffffffff is not cached and used to access IO devices. This
behaviour can be enabled with:
  cpu_lm32_set_phys_msb_ignore(env, 1);