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qemu-e2k/include/hw/riscv
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Michael Clark a7240d1e4a
SiFive Freedom U Series RISC-V Machine 
This provides a RISC-V Board compatible with the the SiFive Freedom U SDK.
The following machine is implemented:

- 'sifive_u'; CLINT, PLIC, UART, device-tree

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Michael Clark <mjc@sifive.com>
 		2018-03-07 08:30:28 +13:00
..
riscv_hart.h RISC-V HART Array 2018-03-07 08:30:28 +13:00
riscv_htif.h
…
sifive_clint.h SiFive RISC-V CLINT Block 2018-03-07 08:30:28 +13:00
sifive_e.h SiFive Freedom E Series RISC-V Machine 2018-03-07 08:30:28 +13:00
sifive_plic.h SiFive RISC-V PLIC Block 2018-03-07 08:30:28 +13:00
sifive_prci.h SiFive RISC-V PRCI Block 2018-03-07 08:30:28 +13:00
sifive_test.h SiFive RISC-V Test Finisher 2018-03-07 08:30:28 +13:00
sifive_u.h SiFive Freedom U Series RISC-V Machine 2018-03-07 08:30:28 +13:00
sifive_uart.h SiFive RISC-V UART Device 2018-03-07 08:30:28 +13:00
spike.h RISC-V Spike Machines 2018-03-07 08:30:28 +13:00
virt.h RISC-V VirtIO Machine 2018-03-07 08:30:28 +13:00