OpenE2K/qemu-e2k
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qemu-e2k/target
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Georg Kotheimer e89b631cf4 target/riscv: Make VSTIP and VSEIP read-only in hip 
Signed-off-by: Georg Kotheimer <georg.kotheimer@kernkonzept.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210311094902.1377593-1-georg.kotheimer@kernkonzept.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2021-03-22 21:54:40 -04:00
..
alpha
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
arm
hw/arm/virt: KVM: The IPA lower bound is 32
2021-03-12 12:47:11 +00:00
avr
target/avr: Fix interrupt execution
2021-03-15 00:39:52 +01:00
cris
target/cris: Plug leakage of TCG temporaries
2021-02-22 09:04:58 +01:00
hexagon
target/hexagon/gen_tcg_funcs: Fix a typo
2021-03-09 21:31:34 +01:00
hppa
exec: Use cpu_untagged_addr in g2h; split out g2h_untagged
2021-02-16 11:04:53 +00:00
i386
i386: Make migration fail when Hyper-V reenlightenment was enabled but 'user_tsc_khz' is unset
2021-03-19 08:48:18 -04:00
lm32
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
m68k
Prepare MacOS ROM support:
2021-03-12 18:56:56 +00:00
microblaze
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
mips
target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX
2021-03-22 15:05:41 +01:00
moxie
exec: Move TranslationBlock typedef to qemu/typedefs.h
2021-02-18 08:19:08 +00:00
nios2
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
openrisc
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
ppc
ppc patch queue for 2021-03-10
2021-03-12 11:30:55 +00:00
riscv
target/riscv: Make VSTIP and VSEIP read-only in hip
2021-03-22 21:54:40 -04:00
rx
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
s390x
target/s390x: Store r1/r2 for page-translation exceptions during MVPG
2021-03-15 11:03:20 +01:00
sh4
target/sh4: Remove unused definitions
2021-03-06 16:18:42 +01:00
sparc
cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass
2021-02-05 10:24:15 -10:00
tricore
target/tricore: Fix OPC2_32_RRPW_EXTR for width=0
2021-03-14 14:49:01 +01:00
unicore32
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
xtensa
semihosting: Move include/hw/semihosting/ -> include/semihosting/
2021-03-10 15:34:12 +00:00
meson.build
Remove deprecated target tilegx
2021-03-09 11:26:32 +01:00