qemu-e2k/tcg/riscv
Jiajie Chen ebe92db2cc tcg: pass vece to tcg_target_const_match()
Pass vece to tcg_target_const_match() to allow correct interpretation of
const args of vector ops.

Signed-off-by: Jiajie Chen <c@jia.je>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230908022302.180442-4-c@jia.je>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-09-15 05:26:51 -07:00
..
tcg-target-con-set.h tcg/riscv: Support CTZ, CLZ from Zbb 2023-05-25 15:29:36 +00:00
tcg-target-con-str.h tcg/riscv: Support ANDN, ORN, XNOR from Zbb 2023-05-25 13:57:52 +00:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg: pass vece to tcg_target_const_match() 2023-09-15 05:26:51 -07:00
tcg-target.h tcg/riscv: Implement negsetcond_* 2023-08-24 11:22:42 -07:00