Peter Maydell
ec97eb6133
* Fix sign-extension for SMLAL* instructions
* Various ptimer device conversions to new transaction API * Add a dummy Samsung SDHCI controller model to exynos4 boards * Minor refactorings of RAM creation for some arm boards -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAl2vMeoZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3qAsEACXH4L45ar+V9OaRAzPm9Qr 5iUZ3iguFlRVXqsBFqzD5mwvpIaQV8PTFUuc3Y1SzOVNmZmOFrfQ1xSuKnI8s7CJ udvGkNulmlV0qy0llr7M2zf8QRDRngoBqLXTSjRk31uWANfWx6RtQzLtPFCawpdH WL2uJFNGBXgen5VRRTaz1Katn53BxPkGdMp7E9pmYmU6a2oJurm7e2t6Hl2Bz6ma BFw0S3MhGXNBooS95gxPGPyoS4lGg12UtxxeU6rQ+6xNGzAYh9kaUUSm4xs+miJ7 aaMzucoTvkoiirASV7pf7daQueGYocTbjVL5NVISjOPpQ62gdxuoZZl2iwyPL3in Io0FUHrDlpVMARUVoqUiRmbuZGC4/8DXJUwSBoGUF3FXmtTlxF2gUxOuUN4gyoIH +iAmTOEX9o01tSNFYk1NTEMWUJrRpvNhWOJBKp+3Wns8IorjQNIiKeNOZzag3aIR PY4Wp9jmI53oQ7awat6NK8I/AuSihNzOpTJi1l4/4+zV02PHwD0+HAVjDq/Ghvu5 u8i7zbuJja04VPl350U/wl49qOWfQTw+CQ/jfYPo09IvFnbJVk8HdxbB3pFsDO9z Sz6UvyQC+3EUq65jCcnh8mJUcd5ZxY1BHYxM9CRaZAjHVXBZ1Yhxl4+8d630ECmZ L3RBgvyHFXzTLNimZVo5kQ== =bqFg -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20191022-2' into staging * Fix sign-extension for SMLAL* instructions * Various ptimer device conversions to new transaction API * Add a dummy Samsung SDHCI controller model to exynos4 boards * Minor refactorings of RAM creation for some arm boards # gpg: Signature made Tue 22 Oct 2019 17:44:26 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20191022-2: hw/arm/digic4: Inline digic4_board_setup_ram() function hw/arm/omap1: Create the RAM in the board hw/arm/omap2: Create the RAM in the board hw/arm/collie: Create the RAM in the board hw/arm/mps2: Use the IEC binary prefix definitions hw/arm/xilinx_zynq: Use the IEC binary prefix definitions hw/arm/exynos4210: Use the Samsung s3c SDHCI controller hw/sd/sdhci: Add dummy Samsung SDHCI controller hw/sd/sdhci: Add a comment to distinct the i.MX eSDHC functions hw/m68k/mcf5208.c: Switch to transaction-based ptimer API hw/watchdog/etraxfs_timer.c: Switch to transaction-based ptimer API hw/timer/altera_timer.c: Switch to transaction-based ptimer API hw/timer/lm32_timer: Switch to transaction-based ptimer API hw/timer/sh_timer: Switch to transaction-based ptimer API hw/timer/puv3_ost.c: Switch to transaction-based ptimer API hw/timer/arm_mptimer.c: Undo accidental rename of arm_mptimer_init() hw/timer/exynos4210_mct: Initialize ptimer before starting it target/arm: Fix sign-extension for SMLAL* Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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=========== QEMU README =========== QEMU is a generic and open source machine & userspace emulator and virtualizer. QEMU is capable of emulating a complete machine in software without any need for hardware virtualization support. By using dynamic translation, it achieves very good performance. QEMU can also integrate with the Xen and KVM hypervisors to provide emulated hardware while allowing the hypervisor to manage the CPU. With hypervisor support, QEMU can achieve near native performance for CPUs. When QEMU emulates CPUs directly it is capable of running operating systems made for one machine (e.g. an ARMv7 board) on a different machine (e.g. an x86_64 PC board). QEMU is also capable of providing userspace API virtualization for Linux and BSD kernel interfaces. This allows binaries compiled against one architecture ABI (e.g. the Linux PPC64 ABI) to be run on a host using a different architecture ABI (e.g. the Linux x86_64 ABI). This does not involve any hardware emulation, simply CPU and syscall emulation. QEMU aims to fit into a variety of use cases. It can be invoked directly by users wishing to have full control over its behaviour and settings. It also aims to facilitate integration into higher level management layers, by providing a stable command line interface and monitor API. It is commonly invoked indirectly via the libvirt library when using open source applications such as oVirt, OpenStack and virt-manager. QEMU as a whole is released under the GNU General Public License, version 2. For full licensing details, consult the LICENSE file. Building ======== QEMU is multi-platform software intended to be buildable on all modern Linux platforms, OS-X, Win32 (via the Mingw64 toolchain) and a variety of other UNIX targets. The simple steps to build QEMU are: .. code-block:: shell mkdir build cd build ../configure make Additional information can also be found online via the QEMU website: * `<https://qemu.org/Hosts/Linux>`_ * `<https://qemu.org/Hosts/Mac>`_ * `<https://qemu.org/Hosts/W32>`_ Submitting patches ================== The QEMU source code is maintained under the GIT version control system. .. code-block:: shell git clone https://git.qemu.org/git/qemu.git When submitting patches, one common approach is to use 'git format-patch' and/or 'git send-email' to format & send the mail to the qemu-devel@nongnu.org mailing list. All patches submitted must contain a 'Signed-off-by' line from the author. Patches should follow the guidelines set out in the CODING_STYLE.rst file. Additional information on submitting patches can be found online via the QEMU website * `<https://qemu.org/Contribute/SubmitAPatch>`_ * `<https://qemu.org/Contribute/TrivialPatches>`_ The QEMU website is also maintained under source control. .. code-block:: shell git clone https://git.qemu.org/git/qemu-web.git * `<https://www.qemu.org/2017/02/04/the-new-qemu-website-is-up/>`_ A 'git-publish' utility was created to make above process less cumbersome, and is highly recommended for making regular contributions, or even just for sending consecutive patch series revisions. It also requires a working 'git send-email' setup, and by default doesn't automate everything, so you may want to go through the above steps manually for once. For installation instructions, please go to * `<https://github.com/stefanha/git-publish>`_ The workflow with 'git-publish' is: .. code-block:: shell $ git checkout master -b my-feature $ # work on new commits, add your 'Signed-off-by' lines to each $ git publish Your patch series will be sent and tagged as my-feature-v1 if you need to refer back to it in the future. Sending v2: .. code-block:: shell $ git checkout my-feature # same topic branch $ # making changes to the commits (using 'git rebase', for example) $ git publish Your patch series will be sent with 'v2' tag in the subject and the git tip will be tagged as my-feature-v2. Bug reporting ============= The QEMU project uses Launchpad as its primary upstream bug tracker. Bugs found when running code built from QEMU git or upstream released sources should be reported via: * `<https://bugs.launchpad.net/qemu/>`_ If using QEMU via an operating system vendor pre-built binary package, it is preferable to report bugs to the vendor's own bug tracker first. If the bug is also known to affect latest upstream code, it can also be reported via launchpad. For additional information on bug reporting consult: * `<https://qemu.org/Contribute/ReportABug>`_ Contact ======= The QEMU community can be contacted in a number of ways, with the two main methods being email and IRC * `<mailto:qemu-devel@nongnu.org>`_ * `<https://lists.nongnu.org/mailman/listinfo/qemu-devel>`_ * #qemu on irc.oftc.net Information on additional methods of contacting the community can be found online via the QEMU website: * `<https://qemu.org/Contribute/StartHere>`_
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