Joel Stanley a1d64b9efc ppc/pnv: Add P10 quad xscom model ... Add a PnvQuad class for the P10 powernv machine. No xscoms are implemented yet, but this allows them to be added. The size is reduced to avoid the quad region from overlapping with the core region. address-space: xscom-0 0000000000000000-00000003ffffffff (prio 0, i/o): xscom-0 0000000100000000-00000001000fffff (prio 0, i/o): xscom-quad.0 0000000100108000-0000000100907fff (prio 0, i/o): xscom-core.3 0000000100110000-000000010090ffff (prio 0, i/o): xscom-core.2 0000000100120000-000000010091ffff (prio 0, i/o): xscom-core.1 0000000100140000-000000010093ffff (prio 0, i/o): xscom-core.0 Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Message-ID: <20230704054204.168547-4-joel@jms.id.au> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>		2023-07-07 04:46:12 -03:00
..
authz
block	block: use bdrv_co_debug_event in coroutine context	2023-06-28 09:46:34 +02:00
chardev
crypto
disas	disas: Change type of disassemble_info.target_info to pointer	2023-06-13 17:25:47 +10:00
exec	plugins: force slow path when plugins instrument memory ops	2023-07-03 12:51:58 +01:00
fpu	fpu: Add float64_to_int{32,64}_modulo	2023-07-01 08:26:54 +02:00
gdbstub
hw	ppc/pnv: Add P10 quad xscom model	2023-07-07 04:46:12 -03:00
io
libdecnumber
migration	include/migration: mark vmstate_register() as a legacy function	2023-07-03 12:52:11 +01:00
monitor
net
qapi
qemu	accel: Rename HAX 'struct hax_vcpu_state' -> AccelCPUState	2023-06-28 13:55:35 +02:00
qom
scsi
semihosting
standard-headers
sysemu	accel/kvm: Re-include "exec/memattrs.h" header	2023-06-28 14:14:22 +02:00
tcg	tcg: Reduce tcg_assert_listed_vecop() scope	2023-07-01 08:26:54 +02:00
ui	ui: add optional d3d texture pointer to scanout texture	2023-06-27 17:08:56 +02:00
user	*-user: remove the guest_user_syscall tracepoints	2023-06-01 11:03:55 -04:00
elf.h
glib-compat.h
qemu-io.h
qemu-main.h