bf3dd1e6d0
Today we have the issue where MSR_* values are the 'inverted order' bit numbers from what the ISA specifies. e.g. MSR_LE is bit 63 but is defined as 0 in QEMU. Add a macro to be used to convert from QEMU order to ISA order. This solution requires less changes than to use the already defined PPC_BIT macro, which would turn MSR_* in masks instead of the numbers itself. Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220504210541.115256-23-victor.colombo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> |
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.. | ||
translate | ||
arch_dump.c | ||
compat.c | ||
cpu_init.c | ||
cpu-models.c | ||
cpu-models.h | ||
cpu-param.h | ||
cpu-qom.h | ||
cpu.c | ||
cpu.h | ||
dfp_helper.c | ||
excp_helper.c | ||
fpu_helper.c | ||
gdbstub.c | ||
helper_regs.c | ||
helper_regs.h | ||
helper.h | ||
insn32.decode | ||
insn64.decode | ||
int_helper.c | ||
internal.h | ||
Kconfig | ||
kvm_ppc.h | ||
kvm-stub.c | ||
kvm.c | ||
machine.c | ||
mem_helper.c | ||
meson.build | ||
misc_helper.c | ||
mmu_common.c | ||
mmu_helper.c | ||
mmu-book3s-v3.c | ||
mmu-book3s-v3.h | ||
mmu-books.h | ||
mmu-hash32.c | ||
mmu-hash32.h | ||
mmu-hash64.c | ||
mmu-hash64.h | ||
mmu-radix64.c | ||
mmu-radix64.h | ||
monitor.c | ||
power8-pmu-regs.c.inc | ||
power8-pmu.c | ||
power8-pmu.h | ||
spr_common.h | ||
tcg-stub.c | ||
timebase_helper.c | ||
trace-events | ||
trace.h | ||
translate.c | ||
user_only_helper.c |