qemu-e2k/target
Richard Henderson 58b53669e8 * ac97 cleanups (Zoltan)
* default the amount of prealloc-threads to smp-cpus (Jaroslav)
 * fix disabling MPX on "-cpu host" with MPX-capable host (Maciej)
 * thread-pool performance optimizations (myself)
 * Hyper-V enlightenment enabling and docs (Vitaly)
 * check ELF header in elf2dmp (Viktor)
 * tweak LBREn migration (Weijiang)
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* ac97 cleanups (Zoltan)
* default the amount of prealloc-threads to smp-cpus (Jaroslav)
* fix disabling MPX on "-cpu host" with MPX-capable host (Maciej)
* thread-pool performance optimizations (myself)
* Hyper-V enlightenment enabling and docs (Vitaly)
* check ELF header in elf2dmp (Viktor)
* tweak LBREn migration (Weijiang)

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# gpg: Signature made Wed 25 May 2022 12:27:04 PM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  i386: docs: Convert hyperv.txt to rST
  i386: Hyper-V Direct TLB flush hypercall
  i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls
  i386: Hyper-V XMM fast hypercall input feature
  i386: Hyper-V Enlightened MSR bitmap feature
  i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES
  ide_ioport_read: Return lower octet of data register instead of 0xFF
  target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host
  hw/audio/ac97: Remove unneeded local variables
  hw/audio/ac97: Remove unimplemented reset functions
  hw/audio/ac97: Coding style fixes to avoid checkpatch errors
  contrib/elf2dmp: add ELF dump header checking
  thread-pool: remove stopping variable
  thread-pool: replace semaphore with condition variable
  thread-pool: optimize scheduling of completion bottom half
  hostmem: default the amount of prealloc-threads to smp-cpus
  target/i386: Remove LBREn bit check when access Arch LBR MSRs

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-05-25 13:46:29 -07:00
..
alpha Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
arm target/arm: Use FIELD definitions for CPACR, CPTR_ELx 2022-05-19 18:34:10 +01:00
avr Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
cris Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
hexagon Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
hppa Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
i386 i386: Hyper-V Direct TLB flush hypercall 2022-05-25 21:26:35 +02:00
m68k Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
microblaze Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
mips Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
nios2 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
openrisc OpenRISC Fixes for 7.0 2022-05-15 16:56:27 -07:00
ppc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
riscv target/riscv: add zicsr/zifencei to isa_string 2022-05-24 10:38:50 +10:00
rx
s390x Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sh4 Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
sparc Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
tricore Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
xtensa Clean up decorations and whitespace around header guards 2022-05-11 16:50:32 +02:00
Kconfig
meson.build