qemu-e2k/target/microblaze
Richard Henderson f523531471 target/microblaze: Convert brk and brki to decodetree
Split these out of the normal branch instructions, as they require
special handling.  Perform the entire operation inline, instead of
raising EXCP_BREAK to do the work in mb_cpu_do_interrupt.

This fixes a bug in that brki rd, imm, for imm != 0x18 is not
supposed to set MSR_BIP.  This fixes a bug in that imm == 0 is
the reset vector and 0x18 is the debug vector, and neither should
raise a tcg exception in system mode.

Introduce EXCP_SYSCALL for microblaze-linux-user.

Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01 07:43:35 -07:00
..
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c target/microblaze: Use cc->do_unaligned_access 2020-09-01 07:43:35 -07:00
cpu.h target/microblaze: Convert brk and brki to decodetree 2020-09-01 07:43:35 -07:00
gdbstub.c target/microblaze: Split out MSR[C] to its own variable 2020-09-01 07:41:38 -07:00
helper.c target/microblaze: Convert brk and brki to decodetree 2020-09-01 07:43:35 -07:00
helper.h target/microblaze: Use cc->do_unaligned_access 2020-09-01 07:43:35 -07:00
insns.decode target/microblaze: Convert brk and brki to decodetree 2020-09-01 07:43:35 -07:00
meson.build target/microblaze: Add decodetree infrastructure 2020-09-01 07:41:38 -07:00
microblaze-decode.h Supply missing header guards 2019-06-12 13:20:21 +02:00
mmu.c target/microblaze: Fix width of PC and BTARGET 2020-09-01 07:41:38 -07:00
mmu.h Supply missing header guards 2019-06-12 13:20:21 +02:00
op_helper.c target/microblaze: Use cc->do_unaligned_access 2020-09-01 07:43:35 -07:00
translate.c target/microblaze: Convert brk and brki to decodetree 2020-09-01 07:43:35 -07:00