qemu-e2k/target/ppc
Greg Kurz fa200c95f7 target/ppc: Enable "decrement and test CTR" version of bcctr
Even if all ISAs up to v3 indeed mention:

    If the "decrement and test CTR" option is specified (BO2=0), the
    instruction form is invalid.

The UMs of all existing 64-bit server class processors say:

    If BO[2] = 0, the contents of CTR (before any update) are used as the
    target address and for the test of the contents of CTR to resolve the
    branch. The contents of the CTR are then decremented and written back
    to the CTR.

The linux kernel has spectre v2 mitigation code that relies on a
BO[2] = 0 variant of bcctr, which is now activated by default on
spapr, even with TCG. This causes linux guests to panic with
the default machine type under TCG.

Since any CPU model can provide its own behaviour for invalid forms,
we could possibly introduce a new instruction flag to handle this.
In practice, since the behaviour is shared by all 64-bit server
processors starting with 970 up to POWER9, let's reuse the
PPC_SEGMENT_64B flag. Caveat: this may have to be fixed later if
POWER10 introduces a different behaviour.

The existing behaviour of throwing a program interrupt is kept for
all other CPU models.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <155327782604.1283071.10640596307206921951.stgit@bahia.lan>
Tested-by: Suraj Jitindar Singh <sjitindarsingh@gmail.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2019-03-29 10:22:22 +11:00
..
translate target/ppc: Optimize x[sv]xsigdp using deposit_i64() 2019-03-12 14:33:05 +11:00
arch_dump.c
compat.c
cpu-models.c
cpu-models.h
cpu-qom.h
cpu.c
cpu.h target/ppc: introduce vsr64_offset() to simplify get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() 2019-03-12 14:33:04 +11:00
dfp_helper.c
excp_helper.c target/ppc: Move exception vector offset computation into a function 2019-03-12 14:33:04 +11:00
fpu_helper.c
gdbstub.c
helper_regs.h
helper.h
int_helper.c
internal.h target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
kvm_ppc.h target/ppc/spapr: Enable H_PAGE_INIT in-kernel handling 2019-03-12 14:33:04 +11:00
kvm-stub.c
kvm.c spapr: Use CamelCase properly 2019-03-12 14:33:05 +11:00
machine.c target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order 2019-03-12 14:33:04 +11:00
Makefile.objs
mem_helper.c
mfrom_table_gen.c
mfrom_table.inc.c
misc_helper.c
mmu_helper.c
mmu-book3s-v3.c
mmu-book3s-v3.h
mmu-hash32.c
mmu-hash32.h
mmu-hash64.c
mmu-hash64.h
mmu-radix64.c
mmu-radix64.h
monitor.c
timebase_helper.c
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
translate_init.inc.c target/ppc: add HV support for POWER9 2019-03-12 14:33:05 +11:00
translate.c target/ppc: Enable "decrement and test CTR" version of bcctr 2019-03-29 10:22:22 +11:00
user_only_helper.c